Zephyr-EU23-cosimulator_in_zephyr_final.pptx.pdf

1、#EMBEDDEDOSSUMMITArm core+DSP Co-simulationWith customized QEMU in ZephyrHake Huang,NXP SemiconductorsH?How a simulator can benefit?A brief intro to QEMU?SOC co-simulator design pattern?i.MX RT595 QEMU co-simulatorHow a simulator can benefitSimulator BenefitsTypicalWith SimulatorExpertAPPSApps engin

2、eerOS/FWSW application engineerSW DriverEmbedded SW engineerSOCRegister LayerSOCengineerSW DriverOS/FWAPPSRegister LayerSOCHW DedicatedZephyrA brief intro to QEMU QEMU is a machine emulator:it can run an unmodified target operating system(such as Windows or Linux)and all its applications in a virtua

3、l machine QEMU is made of several subsystems:CPU emulator(currently x86,PowerPC,ARM,Sparc,RISC-V,XTENSA etc.,)Emulated devices(e.g.VGA display,16450 serial port,PS/2 mouse and keyboard,IDE hard disk NE2000 network card,.)Generic devices(e.g.block devices,character devices,network devices)used to con

4、nect the emulated devices to the corresponding host devices Machine descriptions(e.g.PC,PowerMac,Sun4m)instantiating the emulated devices Debugger User interfaceGuest InstructionsHost InstructionsPicture source Ref1Object file is parsed to get its symbol table,itsrelocations entries and its code sec

5、tion.The micro operations are located in the code section using the symbol table.The relocations of each micro operations are examined to get the number of constant parameters.A memory copy in C is generated to copy the micro operation code.For some hosts such as ARM,constants must bestored near the

6、 generated code because they are accessed with PC relative loads with a small displacement.Key Concepts for Full-system emulationCo-simulator designCore A processCore B processSOCCore ACore Binter-core inter-operation?1.A real time IPC2.Easy to expand to complex scenario D-Bus https:/www.freedesktop

7、.org/wiki/Software/dbus/is a message bus system,a simple way for applications to talk to one another.helps coordinate process lifecycleheavily tested in the real world over several yearsresult=g_dbus_proxy_call_sync(mu-proxy,Read,g_variant_new(t),offset),G_DBUS_CALL_FLAGS_NO_AUTO_START,-1,NULL,&err)

8、;dbus.service.method(org.qemu.debus.mua,in_signature=t,out_signature=u)def Read(self,offset):A QEMU process whose read/write to device address will translate to dbus operations in python script running as dbus-daemon process4 routines to enable a QEMU dbus device(init,interrupt,write and read)A Pyth

9、on dbus daemon is written here for easy transaction implementWe call it dbus_mu_service.pyimport dbusimport dbus.serviceimport dbus.mainloop.glibhttps:/dbus.freedesktop.org/doc/dbus-python/Real Hardwaredbus daemonMUA with DBUS clientMUB with DBUS clientSystem busCortex-M33System busXtensaZephyr-RTOS

10、 Magicsi.MX RT595 QEMU Co-simulator with DSP Share the same binary with real i.MX RT595 board on Zephyr Re-use Zephyr framework for DSP development Inter-operation from i.MX RT595 Cortex-M33 core to Fusion DSP$git clone git:/git.qemu.org/qemu.git$./configure-target-list=arm-softmmu$make$./build/qemu

11、-system-arm-nographic-machine rt595-m33,boot-base-addr=0 x18001000-kernel/home/shared/temp/zephyr.elfTensilica is known for its customizable Xtensa microprocessor core,which is used in i.MX RT595$git clone git:/git.qemu.org/qemu.git$mkdir qemu-xtensa;cd qemu-xtensa$./qemu/configure-prefix=pwd/root-t

12、arget-list=xtensa-softmmu,xtensaeb-softmmu$make install$./qemu-system-xtensa-nographic-machine xt-rt595-nommu -semihosting -cpu sample_controller kernelNote:the implementation of this part is only for demo purpose,thus the underlying DSP settings are reused from simple controller supported in Zephyr

13、Print the received messagethrough ipmSend pong message through ipmZephyr RTOSAPPCM33 ProcessCM33 QEMUOSSimulatorDbus daemonImplement the MU logicHost OSHost PCDSP ProcessZephyr RTOSQEMU XTENSACortex_m33dbus_mu0000000040000000-0000000040000fff(prio 0,i/o):rt_rstctl0 0000000040001000-0000000040001fff(

14、prio 0,i/o):rt_clkctl0 0000000040002000-0000000040002fff(prio 0,i/o):rt_sysctl0 0000000040020000-0000000040020fff(prio 0,i/o):rt_rstctl1 0000000040021000-0000000040021fff(prio 0,i/o):rt_clkctl1 0000000040022000-0000000040022fff(prio 0,i/o):rt_sysctl1 0000000040025000-0000000040025fff(prio 0,i/o):RT_

15、PINT 0000000040080000-0000000040080fff(prio 0,i/o):iotkit-secctl-ns-regs 0000000040106000-0000000040106fff(prio 0,i/o):rt.flexcomm 0000000040110000-0000000040110fff(prio 0,i/o):dbus_client_mua 0000000040113000-0000000040113fff(prio 0,i/o):rt-ostimer 0000000040122000-0000000040122fff(prio 0,i/o):rt.f

16、lexcomm.i2c 0000000040127000-0000000040127fff(prio 0,i/o):rt.flexcomm.i2c 0000000040134000-0000000040134fff(prio 0,i/o):rt.flexspi 0000000040135000-0000000040135fff(prio 0,i/o):rt_pmc 0000000040136000-00000000401360ff(prio 0,i/o):sdhci 0000000040137000-00000000401370ff(prio 0,i/o):sdhci 000000004013

17、a000-000000004013afff(prio 0,i/o):rt-lpadc 000000004013c000-000000004013cfff(prio 0,i/o):rt.flexspi 000000004020d000-000000004020dfff(prio 0,i/o):rt.flexcomm 0000000040004000-0000000040004fff(prio 0,i/o):IOPCTL 0000000040026000-0000000040026fff(prio 0,i/o):PERIPHERAL_MUXES 0000000040033000-000000004

18、0033fff(prio 0,i/o):CACHE_Control_0 0000000040034000-0000000040034fff(prio 0,i/o):CACHE_Control_1 0000000040100000-0000000040102fff(prio 0,i/o):HS_GPIO 0000000040204000-0000000040206fff(prio 0,i/o):SEC_HS_GPIO0000000040012000-0000000040012fff(prio 0,i/o):armsse-cpu-pwrctrl 000000004001f000-000000004

19、001ffff(prio 0,i/o):armsse-cpuid 0000000050000000-000000005fffffff(prio-1500,i/o):alias alias 3 arm-sse-cpu-container0 0000000040000000-000000004fffffff 0000000050010000-0000000050010fff(prio 0,i/o):cachectrl0 0000000050011000-0000000050011fff(prio 0,i/o):CPUSECCTRL0Fusion DSP(RT595_XTENSA)000000000

20、0000000-ffffffffffffffff(prio 0,i/o):system 0000000000800000-0000000000807fff(prio 0,ram):sram0 0000000000808000-000000000080ffff(prio 0,ram):sram1 0000000000810000-0000000000817fff(prio 0,ram):sram2 0000000000818000-000000000081ffff(prio 0,ram):sram3 0000000000820000-0000000000827fff(prio 0,ram):sr

21、am4 0000000000828000-000000000082ffff(prio 0,ram):sram5 0000000000830000-0000000000837fff(prio 0,ram):sram6 0000000000838000-000000000083ffff(prio 0,ram):sram7 0000000000840000-000000000084ffff(prio 0,ram):sram8 0000000000850000-000000000085ffff(prio 0,ram):sram9 0000000000860000-000000000086ffff(pr

22、io 0,ram):sram10 0000000000870000-000000000087ffff(prio 0,ram):sram11 0000000000880000-000000000089ffff(prio 0,ram):sram12 00000000008a0000-00000000008bffff(prio 0,ram):sram13 00000000008c0000-00000000008dffff(prio 0,ram):sram14 00000000008e0000-00000000008fffff(prio 0,ram):sram15 0000000000900000-0

23、00000000093ffff(prio 0,ram):sram16 0000000000940000-000000000097ffff(prio 0,ram):sram17 0000000000980000-00000000009bffff(prio 0,ram):sram18 00000000009c0000-00000000009fffff(prio 0,ram):sram19 0000000000a00000-0000000000a3ffff(prio 0,ram):sram20 0000000000a40000-0000000000a7ffff(prio 0,ram):sram21

24、0000000000a80000-0000000000abffff(prio 0,ram):sram22 0000000000ac0000-0000000000afffff(prio 0,ram):sram23 0000000000b00000-0000000000b3ffff(prio 0,ram):sram24 0000000000b40000-0000000000b7ffff(prio 0,ram):sram25 0000000000b80000-0000000000bbffff(prio 0,ram):sram26 0000000000bc0000-0000000000bfffff(p

25、rio 0,ram):sram27 0000000000c00000-0000000000c3ffff(prio 0,ram):sram28 0000000000c40000-0000000000c7ffff(prio 0,ram):sram29 0000000000c80000-0000000000cbffff(prio 0,ram):sram30 0000000000cc0000-0000000000cfffff(prio 0,ram):sram31 000000003ffc0000-000000003ffdffff(prio 0,ram):xtensa.dataram1 00000000

26、3ffe0000-000000003fffffff(prio 0,ram):xtensa.dataram0 0000000040000000-000000004001ffff(prio 0,ram):xtensa.instram0 0000000040111000-0000000040111fff(prio 0,i/o):dbus_client_mub 0000000050000000-0000000053ffffff(prio 0,ram):xtensa.sysrom0 0000000060000000-000000006fffffff(prio 0,ram):xtensa.sysram0d

27、bus_muShow timeExtension work1.Create several customized QEMU for CI testing2.Use those QEMU system for code coverage analysis3.Extend user cases with co-simulationRefences:QEMU introduce https:/www.usenix.org/legacy/event/usenix05/tech/freenix/full_papers/bellard/bellard.pdfi.MX RT595 Reference manualhttps:/ Thank youFor any issues or questions,please feel free to email me orZephyr Test Working Group testing-wglists.zephyrproject.org