CSET：2022年回流先進半導體封裝創新供應鏈安全和美國半導體領先地位（英文版）（44頁）.pdf

1、Policy BriefJune 2022Re-Shoring Advanced Semiconductor PackagingInnovation,Supply Chain Security,and U.S.Leadership in the Semiconductor IndustryAuthorJohn VerWey Center for Security and Emerging Technology|1 Executive Summary In the United States,both the semiconductor industry and the government a

2、re engaged in ambitious plans to expand domestic semiconductor manufacturing capacity.Previous CSET research has covered in detail these efforts to“re-shore”this manufacturing.1 The research found that the Creating Helpful Incentives to Produce Semiconductors(CHIPS)for America Act incentives,if care

3、fully targeted and augmented by adequate regulatory and workforce support,could reverse the observable decline in U.S.semiconductor manufacturing capacity since 1990.This paper expands on that work and argues that targeted investment incentives to increase U.S.-based advanced packaging capacity are

4、also important.Historically,packaging was viewed as a labor-intensive and low value-added“back-end”activity(as opposed to high value-added“front-end”semiconductor fabrication).As a result,firms offshored these activities to overseas locations,primarily in Asia.Two macro trends are driving a change i

5、n how packaging is viewed:First,firms increasingly recognize how important packaging is to processing power,particularly as Moores Law slows.As a result,firms are investing large amounts of capital to develop equipment,materials,and systems that support the advanced packaging ecosystem.Second,innova

6、tion in advanced packaging will be a key determinant of the depth and breadth of innovation in other emerging technologies.This papers key findings and recommendations include:Leadership in advanced packaging is essential for future semiconductor industry competitiveness.As the limits of Moores Law

7、are reached,advances in packaging are increasingly essential to maintain innovation roadmaps and improve system performance.There is limited semiconductor packaging capacity in the United States,and the associated ecosystem is lacking.The global semiconductor industry has continued a multi-decade tr

8、end of locating most assembly,test,and packaging facilities in Asia.Likewise,the packaging ecosystem is concentrated in Asia.The result of these investments is a dearth of packaging capacity in the United States,and the trend extends to advanced packaging.Re-shoring advanced packaging is essential t

9、o increase semiconductor supply chain security.Increasing U.S.semiconductor supply chain resilience is an economic and national security priority.The United States needs to increase domestic capacity in Center for Security and Emerging Technology|2 both semiconductor manufacturing and advanced packa

10、ging.Multiple provisions within the CHIPS Act authorize,but do not require,funds to be directed toward advanced packaging projects.Funds should be targeted to incentivize these steps and the resilience of the associated ecosystem(for example,substrates).The current focus on increasing the capacity f

11、or advanced semiconductor fabrication should be paired with a concurrent emphasis on U.S.-based advanced packaging.The CHIPS Act rightly focuses on increasing domestic semiconductor fabrication.The United States should also use funds made available by this legislation to increase the advanced packag

12、ing that integrated device manufacturers(IDMs)and foundries provide.This can be accomplished by favoring fabrication project proposals that include co-located packaging facilities.The United States should create and implement programs to increase domestic advanced packaging innovation.Improvements i

13、n advanced packaging will partially dictate future semiconductor industry leadership.Innovations will occur in areas such as chiplets,wafer-level packaging,and packaging equipment automation.The United States can and should make investments and provide incentives to ensure continued semiconductor in

14、dustry leadership in these areas.Center for Security and Emerging Technology|3 Table of Contents Executive Summary.1 Introduction.4 Background.6 What Is Packaging and Why Does It Matter?.6 The Growing Importance of Advanced Packaging.9 Who Performs Packaging:OSATs,IDMs,and Foundries.11 How Packaging

15、 Is Done:Materials,Equipment,and Services.12 Assembly and Packaging Materials.13 Assembly and Packaging Equipment.14 OSAT,IDM,and Foundry Packaging Vendors.15 U.S.Policy and Advanced Packaging.17 Re-Shoring Advanced Packaging in the United States.19 Recommendations.25 Conclusion.27 Author.28 Acknowl

16、edgments.28 Appendix A.The Advanced Packaging Ecosystem:Supply,Demand,and Firm Leadership.29 OSAT,IDM,and Foundry Packaging Vendors.29 Advanced Packaging Equipment.30 Advanced Packaging Materials.30 Countries and Regions That Lead in Advanced Packaging.31 East Asia.31 China.32 United States.34 Endno

17、tes.36 Center for Security and Emerging Technology|4 Introduction “Packaging”is the process of protecting and connecting finished semiconductors(“chips”).After a chip is fabricated in a semiconductor factory(“fab”),it needs to be protected and attached to a printed circuit board(PCB)to function in a

18、n electronic device such as a smartphone.Advanced packaging is a subset of traditional packaging and involves“a collection of approaches for combining chips into packages,resulting in lower power consumption and lower cost.”2 Historically,packaging was viewed as a labor-intensive and low value-added

19、 back-end activity(as opposed to high value-added front-end semiconductor fabrication).As a result,firms offshored these activities to overseas locations,primarily in Asia.Two factors are driving a change in how packaging is viewed:First,firms increasingly recognize how important packaging is to pro

20、cessing power,particularly as Moores Law slows.As a result,firms are investing large amounts of capital to develop equipment,materials,and systems that support the advanced packaging ecosystem.Packaging was historically seen as a necessity to maintain the functionality of semiconductors.Advanced pac

21、kaging is increasingly viewed as an opportunity to advance the leading edge in semiconductor technologies.Packaging is becoming a bottleneck to semiconductor innovation because“densities of transistors in logic and memory chips have continued to increase exponentially,but the density of interconnect

22、s wires between logic and memorygoverned by packaginghave increased at a much slower rate,leading to communication bottlenecks between chips.”3 The semiconductor industry has focused fewer resources on addressing this problem in favor of continuing traditional complementary metal-oxide semiconductor

23、 scaling as dictated by Moores Law.However,as transistor density reaches physical limits,the industry seeks novel ways to increase chip performance.4 New packaging techniques promise to increase interconnect density,which will accelerate signal speed and reduce energy requirements.5 Advanced packagi

24、ng has entered the mainstream of the semiconductor industry.Leading firms are placing multi-billion-dollar bets on advanced packaging,and the technologies are poised to see adoption across a wide variety of electronic systems.Leading firms are attempting to cement their positions through strategic i

25、nvestments in advanced packaging today that will preclude competition tomorrow.Notably,these investments increasingly focus on automating the packaging process.Investments that develop packaging automation change the economic calculations that companies face when considering where to establish or ex

26、pand packaging operations.As factories become more automated,labor costs become less of a factor in determining where to Center for Security and Emerging Technology|5 establish facilities.This trend is potentially favorable for U.S.re-shoring efforts,and the change has important implications,given o

27、ngoing unease among U.S.policymakers about the security of the semiconductor supply chain.Policymakers should craft incentives to re-shore advanced packaging capacity with these changing costs in mind.Second,innovation in advanced packaging will be a key determinant of the depth and breadth of innov

28、ation in other emerging technologies.Currently,advanced packaging technologies are predominantly used in mobile and consumer electronic applications.Increasingly,however,these technologies will see widespread adoption in cloud computing,medical,automotive,and aerospace applications.6 Advances in pac

29、kaging amplify improvements in transistor density,and improvements in transistor performance have important implications for firm leadership in a wide variety of emerging technologies.Firms that lead in advanced packaging,along with systems that lead in incorporating advanced packaged technologies,w

30、ill enjoy asymmetric performance advantages in the short and medium term.In support of the aforementioned arguments,this paper consists of four sections:The first section provides background on semiconductor packaging and advanced packaging:what it is,how it is done,and why it matters.Packagings gro

31、wing importance is detailed,and leading suppliers and consumers identified.The second section describes current U.S.efforts related to advanced packaging and key considerations.The third section summarizes findings and provides recommendations.The Appendix provides more granular information about ad

32、vanced packaging supply and demand,including Chinese,East Asian,and U.S.firm leadership in semiconductor advanced packaging materials,equipment,and services.Center for Security and Emerging Technology|6 Background What Is Packaging and Why Does It Matter?The process of semiconductor production invol

33、ves three general steps:design;fabrication;and assembly,test,and packaging(ATP).After individual components have been designed and then fabricated on silicon wafers,ATP involves the use of specialized equipment and materials to dice the wafers into individual chips(assembly),test the chips for opera

34、bility(test),and finally package them onto a larger device(packaging)to protect and enable their functionality.While ATP represents discrete steps in the semiconductor fabrication process,they are generally carried out sequentially,frequently by the same firms using the same facilities in the same r

35、egion(s)of the world.This paper,while focused on advanced packaging specifically,also discusses assembly and test to the extent that both relate to packaging.Figure 1.Electronics System Integration and Packaging Source:Santosh Kumar,Stefan Chitoraga,and Favier Shoo,“Status of the Advanced Packaging

36、Industry 2021”(Yole Dveloppement,September 2021),10.As Figure 1 shows,semiconductor packaging provides two benefits:(1)it protects finished chips against threats such as mechanical impact,chemical contamination,radiation,heat,and/or light exposure,all of which can upset the functionality of an integ

37、rated circuit;and(2)it provides a means of connecting an integrated circuit to the Center for Security and Emerging Technology|7 external environment,such as a PCB,via balls,wires,or pins.These connections enable a devices functionality.Semiconductor packaging is an intermediate stage between manufa

38、cturing chips on silicon wafers and their incorporation into finished electronic devices such as smartphones.Advanced packaging refers to a subset of conventional semiconductor packaging that uses novel techniques and materials to increase integrated circuit performance,power,modularity,and durabili

39、ty.These advanced packages have a variety of benefits:lower latency,increased bandwidth,better efficiency and power delivery,and higher input/output density.7 Figure 2.Electronic Packaging Evolution from 1970s to Present Source:Seunghyuk Choi,Christopher Thomas,and Florian Weig,“Advanced-Packaging T

40、echnologies:The Implications for First Movers and Fast Followers”(McKinsey,2014).Over time,manufacturers have employed different types of packaging techniques depending on the system into which the integrated circuits are incorporated(Figure 2).Integrated circuits destined for end use in a mobile ph

41、one have different packaging requirements(e.g.,speed,size,and weight)than integrated circuits designed to be used in a satellite(e.g.,radiation tolerance,resilience in extreme temperatures).Advanced packaging of electronics is particularly valued by customers in the mobile/consumer electronics marke

42、t,given the unique performance requirements of their electronic systems.8 There are about 1,000 different package types available to semiconductor manufacturers.9 Package types are differentiated and segmented by interconnect type.Interconnects are what connects one finished semiconductor chip to an

43、other in a package.The purpose of interconnects is to transmit electronic signals between Center for Security and Emerging Technology|8 semiconductors and PCBs quickly and accurately.More advanced packaging techniques are associated with a decrease in package size and power consumption along with an

44、 increase the density of interconnects(known as the input/output count).Figure 3.Combined Timeline of Front-End vs.Back-End Technology Node Development and Packaging Revenue Source:Kumar,Chitoraga,and Shoo,“Status of the Advanced Packaging Industry 2021,”62.The most common interconnect types used in

45、 packaging today are wire bonds(in which minuscule wires connect a chip to a PCB to transfer electronic signals).The challenge with wire bonds is that their size did not scale down at the same pace as did transistor density(Figure 3),meaning transistors contained more processing power than the wires

46、 were capable of communicating.Advanced packaging attempts to solve this problem by using new or novel interconnect approaches such as“bumps,”“balls,”or“wafer-level packaging”rather than wires to connect chips.This minimizes package size and maximizes performance at steady to declining costs.Table 1

47、 presents a non-exhaustive list of advanced packaging technologies,some of which are described in greater detail below.Center for Security and Emerging Technology|9 Table 1.Types of Advanced Packaging Technologies Advanced Packaging Technology Notable Sub-segment(s)Advanced Packaging Wafer Split,202

48、0 Wafer Split Compound Annual Growth Rate,201925 Leading Firms Flip-Chip Chip Scale Package(FC-CSP)43%8%ASE,Amkor,TSMC,JCET Ball Grid Array(FC-BGA)OSATs:ASE,Amkor,JCET IDMs:Micron,SK Hynix,Samsung 2D,2.5D,3D Stacking N/A 5%15%Intel,TSMC,Samsung,SK Hynix,Sony Fan-Out Wafer-Level Packaging(FO-WLP)4%15

49、%TSMC,ASE,JCET Panel-Level Packaging(FO-PLP)12%Samsung,PTI,ASE Fan-In Wafer-Level Packaging(FI-WLP)48%5%ASE,Amkor,TSMC,JCET Embedded Die/System in Package(SiP)N/A 1%23%ASE,SEMCO Source:Kumar,Chitoraga,and Shoo,“Status of the Advanced Packaging Industry 2021,”36;Heterogeneous Integration Roadmap,2021

50、 edition(IEEE Electronics Packaging Society),https:/eps.ieee.org/technology/heterogeneous-integration-roadmap/2021-edition.html.The Growing Importance of Advanced Packaging Growth in the advanced packaging market is a testament to its increasing importance for both consumers and producers of semicon

51、ductors.The overall packaging markets value in 2014 stood at$53.2 billion,with advanced packaging accounting for$20.2 billion(38 percent)of that total.By 2024,estimates suggest the overall packaging Center for Security and Emerging Technology|10 markets value will be around$96.1 billion,with advance

52、d packaging accounting for$48.2 billion(50 percent)of that total.10 Some industry estimates are even more optimistic,observing that the advanced packaging markets value stood at$24.9 billion in 2019,and forecasting growth to$73.3 billion in 2027(a 12.1 percent compound annual growth rate).11 Worldwi

53、de,the number of wafers destined for advanced packaging as opposed to conventional packaging(the“wafer split”)stood at 19 percent versus 81 percent in 2014.This differential is expected to change significantly in the coming years due to the growing importance of advanced packaging.By 2026,analysts a

54、nticipate that the wafer split between advanced and traditional packaging will be 35 percent versus 65 percent.12 This doubling of advanced packagings share of wafers is partially due to the fact that the value of an advanced packaging wafer is double that of a traditionally packaged wafer,resulting

55、 in a high profit margin for manufacturers.13 The reason for this high value is the increased performance associated with chips that have been packaged using advanced techniques.High profit margins coupled with increased performance have resulted in substantial investments by established and emergin

56、g companies keen to enter this market.As demand for semiconductor content increases,there is a commensurate demand for advanced packaging services.The mobile consumer electronics market has historically been the primary consumer of advanced packaging products.More recently,electronic devices support

57、ing telecommunications and infrastructure,as well as automotive and transportation use cases,have started to include advanced packaging in their technology roadmaps.Mobile and consumer accounted for 71 percent of the advanced packaging market by revenue in 2020,followed by telecommunications and inf

58、rastructure(20 percent)and automotive and transportation(7 percent).14 Aerospace/defense and medical/industrial are other small but growing consumers of advanced packaging.15 Increasingly,the importance of advanced packaging is recognized by a variety of firms,in markets ranging from consumer electr

59、onics to auto manufacturing to high performance computing.Firms such as Apple and AMD partner with TSMC for foundry services and have expanded their partnerships to include advanced packaging services.One example of this is the Apple S4 Watch,which makes use of an advanced packaging technique known

60、as System in Package(SiP)to achieve a 37 percent package area reduction,without any reduction in performance.16 One leading outsourced semiconductor assembly and test(OSAT)firm,Amkor,reported that Apple alone accounted for 14.5 percent of its total revenue in 2020.17 Similarly,automotive firms such

61、Tesla use TSMC to manufacture their self-driving chips as well as package Center for Security and Emerging Technology|11 them.18 There are also reports that TSMC and Intel will soon be using advanced packaging processes for some of their high performance computing and AI accelerator applications.19

62、Who Performs Packaging:OSATs,IDMs,and Foundries Semiconductor design;fabrication;and assembly,testing,and packaging can occur in a single firman integrated device manufactureror in separate companies,where a chip design(“fabless”)firm designs and sells the chip and purchases fabrication services fro

63、m a contract chipmaker(“foundry”)and ATP services from an outsourced semiconductor assembly and test firm(Figure 4).OSATs,in spite of the name,also provide packaging services.20 And IDMs and OSATs(and some foundries)use materials and equipment to assemble,test,and package finished semiconductors.Adv

64、anced packaging,like conventional packaging,is currently provided via two business models:(1)in-house ATP services performed by IDMs and foundries post-fabrication;and(2)OSAT firms for third-party customers.OSAT customers can include IDMs,fabless firms,and foundries.Figure 4.The Semiconductor Ecosys

65、tem Source:Saif M.Khan,Alexander Mann,and Dahlia Peterson,The Semiconductor Supply Chain:Assessing National Competitiveness”(CSET,January 2021).An earlier CSET report calculated that back-end ATP represented 10 percent of the value of a finished chip,compared with roughly 45 percent value added by t

66、he design and front-end fabrication steps.21 A report from the Semiconductor Industry Association(SIA)and Boston Consulting Group(BCG)shares this finding,estimating that ATP contributes 6 percent of a chips value,while the overall industry segment is Center for Security and Emerging Technology|12 re

67、sponsible for 3 percent of industry research and development(R&D)and 13 percent of industry capital expenditures.22 As a result of this low value-added nature,companies have traditionally viewed the process of assembly,test,and packaging as a labor-intensive and low-margin activity and sought to min

68、imize costs by outsourcing to third-party contract firms or internal company facilities located overseas.Beginning as early as the 1960s,semiconductor manufacturers established factories in Asia to take advantage of low labor rates.23 Outside of the United States and Europe,the leading companies eng

69、aged in semiconductor fabrication today are headquartered in Singapore,Taiwan,South Korea,Japan,and China.24 Leading IDMs and foundries in Europe,the United States,South Korea,and Taiwan also have made considerable investments in advanced packaging,which is discussed below.The OSAT segment,however,i

70、s dominated by firms headquartered in Taiwan and China.How Packaging Is Done:Materials,Equipment,and Services The structure of the supply chain that supports semiconductor packaging mirrors that of the broader semiconductor supply chain.Suppliers of raw materials,components,and equipment provide int

71、ermediate inputs that are used by firms(OSATs,IDMs,or foundries)that operate large,sterile,and increasingly automated factories to process finished chips in preparation for their incorporation in electronic products.Importantly,firms supplying advanced packaging materials,equipment,and services also

72、 compete in the market for conventional packaging.There are few,if any,companies that solely provide products or services targeting the advanced packaging market.The distinction between the assembly and packaging of semiconductors is increasingly blurred,especially when referring to advanced packagi

73、ng.Semiconductor assembly refers to the process of inspecting fabricated wafers for defects,dicing wafers into operable individual chips,bonding those chips to a substrate or PCB,and encasing the chips to protect and connect them to the larger electronic system.Conventional semiconductor packaging i

74、s a subset of this market and refers to the materials,equipment,and services used to encase and label dies in their protective cases,protect the dies from the environment,and handle the final packaging of assembled dies.The term“advanced packaging”combines both of these processes,and increasingly al

75、so makes use of front-end processes and tools such as lithography and metrology equipment.As a result of these blurred lines,this section covers assembly and packaging holistically.25 Center for Security and Emerging Technology|13 Assembly and Packaging Materials The market for assembly and packagin

76、g materials was estimated to be$19 billion in 2019.26 Firms in Japan,South Korea,and Taiwan lead in this market.Assembly and packaging materials primarily consist of substrates,ceramic packages,lead frames,and bonding wire.One leading OSAT firm reported that the principal materials on which it relie

77、d for its packaging processes were“lead frames,laminate substrates,gold and copper wire,mold compound,epoxy,tubes and trays.”27 These materials connect a fabricated chip to an encasing package,though the process and materials depend on the intended end use.One example of this process involves using

78、bond wire to attach the chip to a lead frame.The lead frame transfers data between the chip and external devices.A protective ceramic package,plastic substrate,or encapsulant resin can also be bonded to the chip.Die attach materials including polymers and eutectic alloys are used to attach the chip

79、to packages or substrates.28 Table 2.Market for Semiconductor Assembly and Packaging Materials,2019 Materials Percentage of Market Select Leading Firms(Headquarters)Lead frames 15%SH Material(Japan),Mitsui High-tec(Japan),Shinko(Japan),Ningbo Kangqiang(China),Hualong(China),Trinity(China),Yongzhi(Ch

80、ina)Bond wires 15%Heraeus(Japan),Tanaka Denshi(Japan),Nippon Micro(Japan),Doublink(China),Ningbo Kangqiang(China),YesDo(China),KDDX(China)Ceramic packages 6%Amkor(U.S.),Quik-Pak(USA),29 NGK(Japan),Alent(UK),Hitachi(Japan),LG(South Korea),Henkel(Germany),Zhongwei(China),Yixing(China)Substrates 48%Ibi

81、den(Japan),Nan Ya(Taiwan),Shinko(Japan),Samsung(South Korea),Shennan Circuits(China),Zhuhai Yueya(China),Unimicron(Taiwan)Encapsulation resins 10%Sumitomo(Japan),Henkel(Germany),Hitachi(Japan),Sinopaco(China),HHCK(China)Die attach materials 3%Henkel(Germany),Hitachi(Japan),Sumitomo(Japan),Darbond(Ch

82、ina),Hysol Huawei(China),Y-Bond(China)Other 3%N/A Source:Khan,Mann,and Peterson,The Semiconductor Supply Chain,61.Center for Security and Emerging Technology|14 Assembly and Packaging Equipment Assembly and packaging equipment and tools are used to take completed wafers and transform them into packa

83、ged individual chips.Traditionally,this process is accomplished using equipment that inspects finished wafers,“dices”them into individual integrated circuits,bonds those individual ICs to substrates,and packages the bonded ICs.Some advanced packaging techniques skip the process of dicing wafers and

84、instead inspect them and bond them to a substrate before dicing in a process known as wafer-level packaging.Tools used in this process include those for assembly inspection,dicing,bonding,and integrated assembly.Packaging tools,a subset of assembly tools,consist of equipment used to encase and label

85、 dies in their protective covers,protect the dies from the environment,and handle the final packaging of assembled dies.Assembly and packaging equipment is highly specialized.One leading OSAT reported that it primarily relied on wire bonders and die bonders to provide its packaging services,though“m

86、old,singulation,die attach,ball attach and wafer backgrind”equipment was also used.Importantly,this firm noted that while many types of conventional packaging equipment could be quickly repurposed or“re-tooled,”advanced packaging equipment was more difficult to redeploy.In addition,advanced packagin

87、g equipment such as“sputter and spin coaters,electroplating equipment,and reflow ovens”had longer lead times for delivery and installations.30 Center for Security and Emerging Technology|15 Table 3.Assembly and Packaging Equipment Types,Market Size,and Leading Firms Equipment 2019 Market Size Select

88、 Leading Firms(Headquarters)Assembly inspection$270 million KLA(USA),ASM Pacific(Singapore),Cohu(USA),Grand Tec(China)Dicing$690 million DISCO(Japan),Tokyo Seimitsu(Japan),Longhill(China)Bonding Die attaching$800 million Besi(Netherlands),ASM Pacific(China),Canon(Japan),Hoson(China),PROTEC(South Kor

89、ea),JIAFENG(China)Wire bonding$550 million Kulicke&Soffa(Singapore),Hesse(Germany),Shinkawa(Japan),Jiafeng(China)Advanced interconnect$68 million ASM Pacific(Singapore),SSP(South Korea),KOSES(South Korea),DIAS Automation(China)Packaging$550 million TOWA(Japan),Besi(Netherlands),Hanmi(South Korea),Tr

90、inity Tech(China),Grand Tec(China)Source:Khan,Mann,and Peterson,The Semiconductor Supply Chain,46.OSAT,IDM,and Foundry Packaging Vendors OSATs,IDMs,and foundries use the aforementioned materials and equipment to assemble and package finished wafers.Firms headquartered in Taiwan,the United States,Chi

91、na,South Korea,and Japan account for the vast majority of packaging market share when measured by sales.However,when measured by the locations of physical facilities,Asia is the clear leader.Recent estimates suggest China leads in the overall number of packaging facilities(114),followed by Taiwan(10

92、6),the rest of the Asia-Pacific(65),North America(35),Japan(27),and Europe(19).31 Though firms Center for Security and Emerging Technology|16 headquartered in the United States and Europe maintain some market share,the Semiconductor Industry Association estimates that at least 81 percent of the worl

93、ds ATP capacity is physically located in Asia.32 Figure 5.Country Market Shares for ATP,by Firm Headquarters Table 4.ATP Sectors,Market Size,and Leading Firms Sector 2019 Market Size Select Leading Firms(Headquarters)Outsourced semiconductor assembly and test$28 billion ASE(Taiwan),Amkor(USA),JCET(C

94、hina),Powertech(Taiwan),TongFu(China),Tianshui(China),UTAC(Singapore),others In-house ATP(by foundries and IDMs)$25 billion Intel(USA),Samsung(USA),S.K.Hynix(South Korea),Micron(USA),TSMC(Taiwan),others Source:Khan,Mann,and Peterson,The Semiconductor Supply Chain,”24.Center for Security and Emerging

95、 Technology|17 U.S.Policy and Advanced Packaging While the United States continues to lead in semiconductor design,it has seen a consistent decline in fabrication capacity.33 U.S.-based ATP capacity has seen a similar decline.Though there are several dozen U.S.-headquartered packaging vendors capabl

96、e of providing boutique low-volume services,North Americas share of global packaging capacity is only 3 percent.34 In general,U.S.firms(with the exception of Intel)lack high-volume packaging capacity,and the associated ecosystem(substrates,wafer bumping,equipment)is also lacking.The CHIPS Act aims t

97、o reverse this trend.It includes several provisions related to advanced packaging.These represent a substantial effort by the U.S.government to establish and expand the advanced packaging ecosystem in the United States.Specifically,these provisions provide funding to establish a variety of advanced

98、packaging research and development programs and could,theoretically,also be used to expand advanced packaging capacity in the United States,depending on how the funds are allocated and projects prioritized.Importantly,many of these provisions were funded as part of the U.S.Innovation and Competition

99、 Act(USICA),by the U.S.Senate in June 2021,which is now being reconciled in a conference committee with the America COMPETES Act passed by the U.S.House of Representatives in February 2022.35 Table 5.Recent U.S.Legislation Related to Advanced Packaging Relevant Sections of 2021 NDAA Colloquial Name

100、USICA Funding of 2021 NDAA USICA FY22 Funding USICA Funding FY2326 Section 9902 Mature Node Fabrication Sec.1002(a)(3)(A)$2 billion N/A Section 9903(b)DOD Microelectronics R&D Network Sec.1002(b)$400 million$400 million per year Section 9906(c)(2)(A)(i)National Semiconductor Technology Center Sec.10

101、02(a)(2)(A)$2 billion Amounts divided between Section 9906(c)/(d)/(e)/(f):FY23:$2B FY24:$1.3B Section 9906(d)National Advanced Packaging$2.5 billion Center for Security and Emerging Technology|18 Manufacturing Program FY25:$1.1B FY26:$1.8B Section 9906(f)Manufacturing USA Institute$500 million Sourc

102、e:Authors compilation derived from Public Law No:116-283 and S.1260-United States Innovation and Competition Act of 2021.USICA allocates$2 billion to provide federal assistance to incentivize investment in facilities and equipment in support of the fabrication,assembly,testing,or advanced packaging

103、of semiconductors at mature technology nodes.36 USICA also provides$400 million per year(FY2226)to support the establishment and operation of a Department of Defense Microelectronics research and development network.Some of this funding could be directed toward advanced packaging research,given the

104、myriad DOD electronics packaging requirements.Finally,USICA provides research and development investments in the form of$2 billion for a National Semiconductor Technology Center,$2.5 billion for a National Advanced Packaging Manufacturing Program,and$500 million for a Manufacturing USA Institute in

105、FY22 to support advanced packaging,among other microelectronics research priorities.37 Supplemental funding for these latter programs is also provided for FY2326 to the tune of$1.1$2 billion.Center for Security and Emerging Technology|19 Re-Shoring Advanced Packaging in the United States The aforeme

106、ntioned policies are all worthy aspirations,but the simple fact is that leading foundries and OSATs(nearly all of which are headquartered in Asia,as noted)have very little economic incentive to build an advanced packaging facility in the United States.The costs of re-shoring advanced packaging neces

107、sitate a well-defined strategy that makes efficient use of funds to target specific technologies in the advanced packaging ecosystem.At the same time,the thinking behind this strategy should accept that the economics of re-shoring the broader ATP ecosystem prevent a return of meaningful capacity to

108、the United States.Policymakers should accept that there is almost no economic case for re-shoring mature packaging technologies and instead focus on a strategy that targets advanced packaging specifically.The policy should consist of three pillars:Increase advanced packaging facility capacity in the

109、 United States Increase production of advanced packaging equipment and materials in the United States Target research and development that supports innovation in advanced packaging Increase advanced packaging facility capacity in the United States Industry analysts expect that there will be 29 new f

110、ab construction projects started by the end of 2022.These 29 fabs are estimated to produce up to 14.5 million wafers per year(in 300 mm equivalents).38 This increased wafer fabrication capacity necessitates more advanced packaging capacity in particular,and ATP capacity more generally,to maintain pr

111、ocessing volumes.Current ATP capital expenditure investment levels will need to be sustained or expanded so that OSATs,IDMs,and foundries have the capacity in place to assemble,test,and package the increased wafer fabrication capacity as it comes on line.OSATs,IDMs,and foundries are all contemplatin

112、g new construction of ATP facilities to meet this greater demand,and the United States should provide incentives to encourage firms to establish or expand ATP capacity domestically.Congress is considering allocating billions of dollars directly and indirectly to support the advanced packaging ecosys

113、tem.In addition to the$2.5 billion National Advanced Packaging Manufacturing Program,which is primarily an R&D effort,several lines of funding identified by the CHIPS Act are available as incentives for advanced packaging Center for Security and Emerging Technology|20 facility construction.For examp

114、le,if the$2 billion earmarked for fabrication,assembly,testing,or advanced packaging of semiconductors at mature technology nodes were to be directed specifically to advanced packaging support for mature nodes,these incentives would meaningfully encourage the establishment of new advanced packaging

115、facilities in the United States.Except for Intel,no firms operate high-volume advanced packaging facilities in the United States.As a result,modeling the cost of a U.S.-based AP facilitys construction and operations is difficult.Intel has previously estimated that it would cost$650$875 million to re

116、locate its ATP facility from China to another country.39 Its public financial filings also indicate that it estimates the current value of its China-based ATP facility at around$851 million.40 Meanwhile,Amkor recently estimated that Phase 1 of its new facility in Vietnam required initial capital exp

117、enditures of$200$250 million.41 In addition to the cost of construction,packaging facility costs must take in to account reoccurring operations such as labor and utility rates,which vary substantially between Asia and the United States.42 In order to make these funds go as far as possible,policymake

118、rs should also direct incentives to foundries and IDMs that have plans to expand semiconductor fabrication capabilities in the United States,and should preferentially direct incentive funds to projects that include a front-end fab co-located with a back-end ATP facility,ideally an advanced packaging

119、 facility.Large foundries and IDMs already prefer to co-locate their advanced packaging operations with the fabrication operations,and providing incentives for them to do so in the United States would maximize this return on investment.43 Additional funds could be provided to leading OSATs intereste

120、d in establishing advanced packaging operations in the United States.Importantly,there is a wide variety of techniques and technologies today that constitute advanced packaging,and no approach has emerged as dominant.As a result,policymakers should target incentives at firms that are providing a var

121、iety of packaging services,from wafer-level to flip chip-BGA.These incentives could also be conditioned based on a facilitys capacity,using as reference points cleanroom square footage and wafer processing size.Increase supply of advanced packaging materials in the United States to reduce supply cha

122、in vulnerabilities IC substrates are of particular importance to advanced packaging,and in this market,the presence of U.S.firms as well as U.S.production is extremely limited.IC substrates are used in a wide variety of electronics destined for aerospace,in particular with military applications.The

123、sole U.S.-based supplier of IC substrates suitable for advanced packaging reports that 36 percent of its total net sales(which included IC Center for Security and Emerging Technology|21 substrates and PCBs,among other electronic components)comes from the aerospace and defense market.44 Within the su

124、pply chain for advanced packaging,there is an especially acute shortage of the IC substrate material.45 Of particular concern are Ajinomoto Build Up film substrates.These are used in packaging processes for high-end CPU,GPU and 5G networking chips by major chipmakers,including Intel,AMD,and Nvidia.4

125、6 Fires in October 2020 and February 2021 at Taiwanese producers of substrates exacerbated this supply crunch,leading to delays of up to 40 weeks for certain substrates.47 Suppliers are investing up to$5 billion to expand FC-BGA substrate capacity,but more capacity will be available by late 2022 at

126、the earliest,and it is all located outside the United States.48 An advanced substrate processing facility costs$300 million(Intel has estimated$1 billion),and the equipment to operate such a facility currently has a two-year lead time.49 In spite of the anticipated capacity expansions described here

127、,one industry association estimates that increased capacity will meet just 78 percent of demand for these substrates by 2025.50 One industry association also found that the barriers to entry for the FC-BGA substrate market include an investment of more than$1 billion,market leaders 20-year head star

128、t,and the need for a 1,000-person workforce for every facility.51 Conversely,a South Korean PCB manufacturer recently opened a new facility in Malaysia at a cost of$121 million and reported that it will produce both PCBs and substrates.52 Given the increasing importance of substrates,some funds coul

129、d be directed to encourage the formation of one or more joint ventures(either between an OSAT and a substrate supplier,a foundry/IDM and substrate supplier,or a substrate and PCB supplier)to increase domestic production of IC substrates.Target research and development that supports advanced packagin

130、g Innovation in advanced packaging materials,equipment,and services is essential to future U.S.semiconductor leadership.Improvements that increase semiconductor performance while reducing power consumption,cost,and form factor should be prioritized.In addition,innovations that are easily commerciali

131、zed,flexible,and scalable should be prioritized.53 This section argues that the United States should fund advanced packaging innovations related to chiplets and heterogeneous integration,equipment automation,and wafer-level packaging based on these factors.Center for Security and Emerging Technology

132、|22 Chiplets and Heterogeneous Integration54 Chiplets have risen in popularity as the costs of producing leading-edge chips has increased,the number of firms capable of producing such chips has decreased,and Moores Law has slowed.According to one firm,the semiconductor industry is in the process of“

133、adopting a chiplet based approach to reduce the overall cost,improve the individual yields and deliver required performance.”55 Industry analysts expect that chiplets will be a key enabler of advances in semiconductors“for the next 1020 years.”56 An industry consortium consisting of representatives

134、from leading technology firms was recently established to standardize the chiplet ecosystem.57 A chiplet“is an integrated circuit block that has been specifically designed to communicate with other chiplets,to form larger more complex ICs.Thus,in large and complex chip designs the design is subdivid

135、ed into functional circuit blocks,often reusable IP blocks,called chiplets,that are manufactured and recombined on high density interconnect.”58 In essence,chiplets are a way to make an electronic system behave like it is one integrated circuit,when in fact it is composed of several different smalle

136、r integrated circuits.This is accomplished via heterogeneous integration,“the integration of separately manufactured components into a higher-level assembly(System in PackageSiP)that,in the aggregate,provides enhanced functionality and improved operating characteristics.”59 Chiplets offer four main

137、advantages:(1)they are small,which increases the number of operable chips per wafer(“yield”)and thus economies of scale;(2)they allow for heterogeneous integration of advanced and mature-node chips on the same system,collectively increasing system performance;(3)customers can mix and match or custom

138、ize various chiplets to optimize system performance for their specific applications;(4)chiplets enable a combination of disparate material systems(e.g.,gallium nitride,or GaN)to provide better performance than using just silicon.Advanced packaging systems,materials,and equipment are all essential fo

139、r enabling the die-to-die interconnects on which chiplets rely.60 While chiplets are not a package type,they make use of advanced packaging to integrate different types of chips to form larger and more complex chips that have increased performance and functionality.61 Increasing the adoption and con

140、sumption of chiplets will be contingent on advanced packaging innovations.AMD reports that its chiplet-based prototypes are 15 percent faster than its conventionally packaged equivalent offerings.62 Center for Security and Emerging Technology|23 Emergence of Fan-Out Wafer-Level Packaging Fan-out waf

141、er-level packaging(FOWLP)refers to the process of packaging a finished semiconductor die while still in wafer form,either singly or combined with additional dies or other components such as discrete passive devices,or functional components such as microelectromechanical systems or radio-frequency fi

142、lters.63 This allows the production of wafer-and panel-level packaging using heterogeneous integration.The main advantages of FOWLP are the“substrate-less package,lower thermal resistance,higher performance due to shorter interconnects together with direct IC connection by thin film metallization in

143、stead of wire bonds or flip chip bumps and lower parasitic effects.”64 Interestingly,unlike other parts of the semiconductor supply chain,the supply chain for FOWLP is expanding.Analysts assess that there were 5 firms engaged in FOWLP in 2019,and this number has now grown to 11 in 2021.65 The techno

144、logy is being adopted and popularized by TSMC in particular,and is seeing increased adoption among its clients systems as a result.66 As of 2020,TSMC maintained 66.9 percent of the market share for fan-out advanced packaging.67 Incentives should be directed to encourage TSMC to co-locate an advanced

145、 packaging facility with its Arizona fab to increase U.S.domestic capacity for wafer-level packaging.One example of FOWLPs benefits that is particularly relevant to AI comes from the U.S.chip startup Cerebras.Cerebras designs so-called Wafer Scale Engines(WSEs),an application-specific integrated cir

146、cuit that encompasses an entire wafer and is optimized for machine learning tasks.68 However,as previously discussed,even the fastest chips are constrained by the input/output capacity of their packaging.As a result,reports indicate that Cerebras is partnering with TSMC(its fabrication partner)to de

147、velop a wafer-scale package using TSMCs fan-out process to preserve the size advantage/compute advantage that wafer-level processing creates,and to increase compute-related advances in artificial intelligence research and development.69 One U.S.Department of Energy laboratory reports that Cerebrass

148、technology is providing modeling results 300 times faster than its previous system.70 Further advances in how these WSEs are packaged would increase speeds,and doing so in the United States would benefit innovative U.S.firms and government customers.Advanced Packaging Equipment Innovation As packagi

149、ng techniques such as FOWLP increase in popularity,the equipment and tools that support them must necessarily innovate to meet the demand.Importantly,these innovations in equipment also mean that packaging will become increasingly automated,which potentially will change labor rates and their role in

150、 modeling future Center for Security and Emerging Technology|24 advanced packaging facility costs.In particular,wafer-level packaging places unique demands on equipment,because it necessitates verification that the fabricated wafer contains the maximum number of operable chips.This quality control s

151、tep was traditionally considered a front-end semiconductor fabrication activity,but it is increasingly performed in support of back-end advanced packaging requirements.These requirements have opened new business lines for large(primarily U.S.-based)suppliers of semiconductor manufacturing equipment.

152、More and more,they are now offering products to serve the advanced packaging market.One example of this is California-based KLA,a supplier of quality and process-control equipment that leads the worldwide market for front-end metrology equipment used in semiconductor fabrication.KLA has recently sta

153、rted providing high-sensitivity defect-detection tools for advanced wafer-level packaging.71 Figure 6.Advanced Packaging,Moving from Back End to Front End Source:Kumar,Chitoraga,and Shoo,“Status of the Advanced Packaging Industry 2021,”214.Back-end advanced packaging increasingly resembles front-end

154、 semiconductor fabrication in terms of its need for automation.The more advanced packaging can be automated,the more U.S.equipment firms will benefit and labor rates will decrease as a deciding factor when firms choose where to locate ATP facilities.The United States is poised to benefit from these

155、trends and should make investments in support of it.Center for Security and Emerging Technology|25 Recommendations Based on observable industry trends and the analysis outlined in this paper,any effort to increase semiconductor supply chain resilience must take advanced packaging in to account.Below

156、 are several recommendations to inform this effort:Leverage CHIPS Act funds to incentivize increased domestic advanced packaging capacity.o Multiple provisions within the CHIPS Act authorize,but do not require,funds to be directed toward advanced packaging projects.To the extent possible,policymaker

157、s should use this latitude to focus funds on efforts that increase domestic advanced packaging capacity and research and development.Preferentially direct CHIPS Act funds to semiconductor fabrication project proposals that include concurrent and co-located investments in advanced packaging capabilit

158、ies.o Large foundries and IDMs such as TSMC,Samsung,and Intel already prefer to co-locate their advanced packaging operations with the fabrication operations,and providing incentives for them to do so in the United States would maximize this return on investment.For example,TSMC and Samsung have ong

159、oing fab construction projects in Arizona and Texas respectively.Both companies have not announced plans to add an advanced packaging facility to their respective projects,but they should be encouraged to do so.Encourage the formation of a U.S.-based joint venture with a leading supplier of IC subst

160、rates used in advanced packaging.o The United States currently lacks sufficient variety and volume of IC substrate capacity to meet advanced packaging demand.Increasing domestic IC substrate capacity would improve advanced packaging supply chain resilience,and semiconductor supply chain resilience m

161、ore generally.Center for Security and Emerging Technology|26 Provide incentives that encourage at least one leading OSAT to establish an advanced packaging facility in the United States that provides commercially viable FC-BGA.Use funds from the National Advanced Packaging Manufacturing Program to p

162、romote advanced packaging innovation.o There is a wide variety of techniques and technologies today that constitute advanced packaging,and no approach has emerged as dominant.Policymakers should target R&D funds at firms and consortia that are providing a variety of packaging services,from wafer-lev

163、el to flip chip-BGA.These incentives could also be conditioned based on facility capacity,using as reference points cleanroom square footage and wafer processing size.o For example,funds could be used to:Establish a public private partnership between U.S.OSATs and IDMs and a U.S.university that feat

164、ures a Class 10,000 cleanroom engaged in research and development of IC substrates and advanced packaging technologies.Promote innovation in chiplets,wafer-level packaging,and packaging equipment automation.Center for Security and Emerging Technology|27 Conclusion The United States semiconductor ind

165、ustry and the U.S.government are engaged in ambitious plans to expand domestic semiconductor manufacturing capacity.This paper argues that targeted investment incentives to increase U.S.-based advanced packaging capacity are also important for increasing semiconductor supply chain resilience.Center

166、for Security and Emerging Technology|28 Author John VerWey is an East Asia National Security Advisor at Pacific Northwest National Laboratory.Acknowledgments For helpful feedback and suggestions,the author would like to thank Yan Zheng,Dan Wang,Igor Mikolic-Torreira,and Will Hunt.He would also like

167、to thank Melissa Deng,Shelton Fitch,Lynne Weil,Dale Brauner,Danny Hague,and Adrienne Thompson for editorial support.2022 by the Center for Security and Emerging Technology.This work is licensed under a Creative Commons Attribution-Non Commercial 4.0 International License.To view a copy of this licen

168、se,visit https:/creativecommons.org/licenses/by-nc/4.0/.Center for Security and Emerging Technology|29 Document Identifier:doi:10.51593/20220024 Appendix.The Advanced Packaging Ecosystem:Supply,Demand,and Firm Leadership OSAT,IDM,and Foundry Packaging Vendors As of 2020,the top 10 leading firms enga

169、ged in advanced packaging accounted for 93 percent of all advanced packaging capacity.These 10 firms are located in Taiwan(48 percent of all capacity),the United States(22 percent),China(14 percent),and South Korea(9 percent).As Figure A shows,Taiwanese-headquartered OSAT firms and foundries(ASE Gro

170、up,TSMC,Chipbond,and ChipMOS)collectively maintain a leading position in advanced packaging,followed by OSATs and IDMs headquartered in the United States(Amkor and Intel),China(JCET,Huatian)and South Korea(Samsung,Nepes).Figure A.Advanced Packaging 2020 Wafer Split by Country(300 mm equivalent)Cente

171、r for Security and Emerging Technology|30 Many of these same firms also lead in conventional packaging and are making substantial investments to expand their advantage in advanced packaging.Firms in the United States and Taiwan are the leaders in advanced packagingfocused capital expenditures.Table

172、A.2020 Leading Advanced Packaging Capital Expenditures Firm HQ Country AP CapEx($B)AP CapEx Split Intel United States 3.5 32%TSMC Taiwan 2.8 25%ASE Group Taiwan 2 18%Samsung S.Korea 1.5 14%Amkor United States 0.7 6%JCET China 0.5 5%Source:Kumar,Chitoraga,and Shoo,“Status of the Advanced Packaging In

173、dustry 2021,”236.Advanced Packaging Equipment The leading firms engaged in AP equipment are,with few exceptions,firms that also lead in the markets for conventional packaging and assembly equipment.These firms are primarily based in Japan,Taiwan,South Korea,and China.For example,DISCO,a Japanese cor

174、poration,provides a variety of specialized equipment used in back-end assembly,and its advanced packaging tools are particularly valued.72 In addition to those designed specifically for advanced packaging uses,conventional packaging tools such as laminators,plating systems,and drilling systems are a

175、lso used.73 Firms in Europe and the United States are competitive in some sub-segments of advanced packaging equipment,particularly because advanced packaging increasingly makes use of techniques and tools that traditionally are found in front-end semiconductor manufacturing,such as lithography,etch

176、,and deposition,areas in which these firms are already competitive.For example,Applied Materials,a leading provider of deposition equipment used in front-end semiconductor fabrication,also offers tools for use in wafer-level packaging.74 Advanced Packaging Materials With few exceptions,the leading f

177、irms engaged in the supply of AP materials are based in Asia.The materials consist of IC substrates,some of which are essential to Center for Security and Emerging Technology|31 advanced packaging,and others used in bumping or lead frames.IC substrates are particularly important in advanced packagin

178、g,especially FC-BGA substrates,which are used in artificial intelligence accelerators,automotive electronics,and high-performance computers.75 Firms headquartered in Asia lead in this market as well(Table B).Table B.Firm Leadership in the IC Substrate Market,202076 Firm Headquarters FY20 Sales($M)Ma

179、rket Share Unimicron Taiwan 1,635 16%Ibiden Japan 1,240 12%SEMCO South Korea 1,092 11%Nan Ya PCB Taiwan 945 9%Shinko Japan 876 8%Simmtech South Korea 728 7%Kinsus Taiwan 669 7%Daeduck South Korea 450 4%LG Innotek South Korea 382 4%AT&S Austria 300 3%ASE Material Taiwan 282 3%Kyocera Japan 281 3%Shen

180、nan Circuit China 211 2%Korea Circuits South Korea 178 2%Toppan Printing Japan 136 1%Others 783 8%Source:Matt Kelly and Jan Vardaman,“An Analysis of the North American Semiconductor and Advanced Packaging Ecosystem”(IPC,November 2021),112,https:/emails.ipc.org/links/IPCadvpack-ecosystem-report-final

181、.pdf.Countries and Regions That Lead in Advanced Packaging East Asia By any metric(firm headquarters,revenue,capacity,or factory location),Asia remains the center of gravity for semiconductor packaging and advanced packaging.Today,9 of the 10 largest OSAT firms by revenue are headquartered in mainla

182、nd China(3),Taiwan(5),and Singapore(1).77 There are also several leading firms in the top 25 headquartered in South Korea and Japan.Additionally,leading OSAT firms have a Center for Security and Emerging Technology|32 notable physical presence(i.e.,factories)in countries such as the Philippines and

183、Malaysia.78 This regional concentration is due in large part to physical proximity to Chinas market and the many Chinese firms engaged in electronic component assembly.79 Firms in Taiwan,Japan,and South Korea lead in advanced packaging.Taiwans ASE Group(26 percent),TSMC(15 percent),Chipbond(5 percen

184、t),and ChipMOS(2 percent)are all among the top 10 firms in 2020,when measured by advanced packaging wafers.South Koreas Samsung(6 percent)and Nepes(3 percent)are also among the top 10.80 Taiwans competitiveness is particularly notable:firms in Taiwan account for nearly 50 percent of worldwide advanc

185、ed packaging capacity(see Figure 1 above,Advanced Packaging 2020 Wafer Split by Country(300 mm equivalent).Firms in East Asia also lead in advanced packaging equipment.Firms in Japan are particularly strong in this sub-segment of the market.Companies such as USHIO supply specialty lithography steppe

186、rs used in packaging81 and Japans Nichigo is a leading supplier of laminating equipment.82 Firms in East Asia also lead in packaging materials.Japans Ajinomoto is the chief supplier of build-up substrates,and another Japanese firm,Sekisui Chemical,is expanding production of build-up films as well.83

187、 Companies in Taiwan account for 40 percent of global flip chip bumping capacity,followed by South Korean firms with 27 percent.84 IC substrates,which account for roughly 50 percent of the overall market for ATP materials,are largely produced by firms in East Asia at facilities located in the region

188、.There are 26 IC substrate production facilities spread between Japan(14),South Korea(7),and Taiwan(5),collectively representing 69 percent of global capacity.85 Many of these businesses have recently announced large capital expenditures to support the advanced packaging requirements of large semico

189、nductor manufacturers such as TSMC and Intel.Intel entered into a deal with Samsung Electro-Mechanic(SEMCO)to increase its supply of FC-BGA substrates,and reports indicate that TSMC has been increasing cooperation with Ibiden and Unimicron in support of its advanced packaging technologies.86 China C

190、hinese-headquartered firms are making large and well-documented investments to accelerate domestic semiconductor industry development in line with government guidance.87 By some estimates,Chinese-headquartered OSATs(such as JCET and Center for Security and Emerging Technology|33 Tongfu Microelectron

191、ics)maintain 21 percent of the market share,while Chinese-headquartered IDMs maintain 6 percent of the market share in ATP.88 The Semiconductor Industry Association estimates that 22 percent of all ATP facilities in the world are located in China.89 These statistics underrepresent Chinese competitiv

192、eness in ATP.Measured by installed capacity,China maintains 38 percent of the worldwide market for ATP.90 This is partially because large international IDMs have chosen to locate high-volume ATP facilities in China.For example,U.S.-headquartered IDMs such as Onsemi,Qorvo,and Micron all operate ATP f

193、acilities in China.91 Firms in China are also competitive in advanced packaging.The JCET Group(11 percent)and Tianshui Huatian(3 percent)are among the top 10 firms worldwide when measured by advanced packaging wafer split.In 2020,JCETs AP wafer split(in 300 mm equivalents)was 81 percent flip chip,14

194、 percent fan-in,and 5 percent fan-out on a total of 3.4 million AP wafers.92 In general,analysts characterize Chinese OSAT firm AP capabilities(especially in WLPs and 2.5D/3D)as lagging behind industry leaders,yet poised to catch up due to mergers and acquisitions and government support.93 There are

195、 also reports that Chinas leading foundry,SMIC,plans to invest in advanced packaging capacity.94 SMIC formed a joint venture with JCET,Chinas leading OSAT,in 2014 to co-locate some facilities related to back-end manufacturing.95 SMIC also raised$6.6 billion through its July 2020 initial public offer

196、ing,96 and analysts expect it to invest in high-end AP capacity(3D SoC,2.5D,hybrid bonding,etc.)and evolve to a foundry model that copies TSMCs offering of both foundry and advanced packaging services.97 No other Chinese foundry or IDM has meaningful AP capacity.Chinese firms are not particularly co

197、mpetitive in the market for conventional packaging equipment and are even less competitive for advanced packaging equipment.Small firms such as Wenyi Trinity Technology are among the top 10 suppliers of packaging tools when measured by sales,but their sales figures are less than one-tenth of those o

198、f the fields leading suppliers.98 Chinese firms are,however,competitive in the market for packaging materials.There are seven notable substrate production facilities in China,representing 18 percent of worldwide capacity.99 Companies such as Shennan Circuit and ZDT have announced plans to enter the

199、FC-BGA substrate market.100 Notably,Shennan Circuit has announced its intent to construct a$925 million substrate facility in Guangzhou.101 Center for Security and Emerging Technology|34 United States U.S.-headquartered IDMs(such as Intel and Texas Instruments)account for 43 percent of worldwide IDM

200、 ATP,and U.S.-headquartered OSATs(for example,Amkor)account for 15 percent of all ATP.102 However these metrics of firm and country-level competitiveness mask the overall decline in U.S.domestic ATP capacity and advanced packaging in general.Nearly all U.S.-headquartered firms engaged in ATP,with th

201、e exception of Intel,choose to locate the majority of their ATP assets and capacity in Asia.The most prominent example of this trend is Amkor,one of the leading ATP firms in the world.Amkor maintains its corporate headquarters in Tempe,Arizona,but 99.7 percent of its physical assets(by value)are loc

202、ated overseas,primarily in South Korea,China,and Taiwan.103 In addition,as shown on each companys 10-K form for the Securities and Exchange Commission filing,Intel(Chengdu),Micron(Xian),Onsemi(Leshan,Shenzhen,and Suzhou),Qorvo(Beijing and Dezhou),and Western Digital(Shanghai and Shenzhen)all have AT

203、P facilities located in China.The cumulative result of this trend is that,when measuring competitiveness by installed capacity and geographic location of facilities,the United States only has 3 percent of worldwide ATP capacity.104 This trend extends to advanced packaging,where several U.S.firms suc

204、h as Amkor(17 percent)and Intel(5 percent)are both among the top 10 firms when measured by advanced packaging wafer split.105 However because all of Amkors advanced packaging capacity is located in its Asia-based facilities,U.S.domestic AP competitiveness is limited to Intels packaging assets.There

205、are also several dozen suppliers of low-volume boutique packaging services,some of which may be considered“advanced”but are not necessarily optimized for the sort of high-volume,low-cost processing provided by advanced packaging competitors in Asia.106 U.S.firms also account for 23 percent of the ma

206、rket for advanced packaging equipment.107 This competitive position may expand as large U.S.firms like Applied Materials,Lam Research,and KLA are making considerable investments in developing advanced packaging equipment deposition,etch,and metrology systems.108 In advanced packaging materials,U.S.f

207、irms have a limited market share.Only one U.S.supplier of IC substrates is suitable for advanced packaging,109 the United States has just 6.5 percent of worldwide capacity for bumping(most of which is owned by IDMs for internal use),and there are no suppliers of lead frames in the United States.110

208、Center for Security and Emerging Technology|35 Several U.S.firms have announced plans to begin or expand packaging capacity at U.S.-based facilities.SkyWater,a Minnesota-based foundry,is investing in an advanced packaging facility in Florida.111 Northrop Grumman recently opened a new packaging facil

209、ity to support its defense microelectronics business.112 And Intel was recently awarded a DOD contract for a State-of-the-Art Heterogeneous Integration Prototype(SHIP)program focused on packaging.113 On top of that,Intel is in the process of investing$3.5 billion to augment its existing facility in

210、Rio Rancho,New Mexico,to support advanced packaging for internal company products and foundry customers.114 Center for Security and Emerging Technology|36 Endnotes 1 See,for example:Will Hunt,“Reshoring Chipmaking Capacity Requires High-Skilled Foreign Talent”(Center for Security and Emerging Techno

211、logy,February 2022),https:/cset.georgetown.edu/publication/reshoring-chipmaking-capacity-requires-high-skilled-foreign-talent/;Will Hunt,“Sustaining U.S.Competitiveness in Semiconductor Manufacturing”(CSET,January 2022),https:/cset.georgetown.edu/publication/sustaining-u-s-competitiveness-in-semicon

212、ductor-manufacturing/;John VerWey,“No Permits,No Fabs:The Importance of Regulatory Reform for Semiconductor Manufacturing”(CSET,October 2021),https:/cset.georgetown.edu/publication/no-permits-no-fabs/.2“Advanced Packaging,”Semiconductor Engineering,https:/ Saif M.Khan,Alexander Mann,and Dahlia Peter

213、son,The Semiconductor Supply Chain:Assessing National Competitiveness(CSET,January 2021),24,https:/cset.georgetown.edu/publication/the-semiconductor-supply-chain/.4 Khan,Mann,and Peterson,The Semiconductor Supply Chain,”24.5“Advanced Packaging,”Semiconductor Engineering.6 Chapter 1,“HIR Overview and

214、 Executive Summary,”Heterogeneous Integration Roadmap,2019 edition(IEEE Electronics Packaging Society,October 2019),https:/eps.ieee.org/images/files/HIR_2021/ch01_overview.pdf.7 Matt Kelly and Jan Vardaman,“An Analysis of the North American Semiconductor and Advanced Packaging Ecosystem”(IPC,Novembe

215、r 2021),31,https:/emails.ipc.org/links/IPCadvpack-ecosystem-report-final.pdf.8 Kelly and Vardaman,“An Analysis of the North American Semiconductor and Advanced Packaging Ecosystem,”34.9 Mark Lapedus,“Expanding Advanced Packaging Production in the U.S.,”Semiconductor Engineering,January 5,2022,https:

216、/ Santosh Kumar,Stefan Chitoraga,and Favier Shoo,“Status of the Advanced Packaging Industry 2021”(Yole Dveloppement,September 2021),29.11“Worldwide Advanced Packaging Industry to 2027:By Technology,End-user,Application,Product,and Geography,”Research and Markets,Cision PR Newswire,August 11,2020,htt

217、ps:/ Kumar,Chitoraga,and Shoo,“Status of the Advanced Packaging Industry 2021,”30.Center for Security and Emerging Technology|37 13 Kumar,Chitoraga,and Shoo,“Status of the Advanced Packaging Industry 2021,”30.14 Kumar,Chitoraga,and Shoo,“Status of the Advanced Packaging Industry 2021,”34.15 Kumar,Ch

218、itoraga,and Shoo,“Status of the Advanced Packaging Industry 2021,”34.16 Kumar,Chitoraga,and Shoo,“Status of the Advanced Packaging Industry 2021,”175.17“Amkor Form 10-K,”SEC Filings,Amkor Technology,February 18,2022,11,https:/ Kumar,Chitoraga,and Shoo,“Status of the Advanced Packaging Industry 2021,

219、”48.19 Kumar,Chitoraga,and Shoo,“Status of the Advanced Packaging Industry 2021,”168.20 Amkor,one of the leading OSATs,characterizes its offerings as follows:“Amkor is one of the worlds leading providers of outsourced semiconductor packaging and test services.We provide turnkey packaging and test se

220、rvices including semiconductor wafer bump,wafer probe,wafer back-grind,package design,packaging,system-level and final test and drop shipment services.”SEC Filings,Amkor Technology,https:/ Khan,Mann,and Peterson,The Semiconductor Supply Chain,”6364.22 Antonio Varas,Raj Varadarajan,Jimmy Goodrich,and

221、 Falan Yinug,“Strengthening the Global Semiconductor Supply Chain in an Uncertain Era”(BCG and SIA,April 2021),19,https:/www.semiconductors.org/strengthening-the-global-semiconductor-supply-chain-in-an-uncertain-era/.23 John VerWey,The Health and Competitiveness of the U.S.Semiconductor Manufacturin

222、g Equipment Industry(Washington,D.C.:Office of Industries Working Paper ID-058,July 2019),https:/www.usitc.gov/publications/332/working_papers/id_058_the_health_and_competitiveness_of_the_sme_industry_final_070219checked.pdf.24 Khan,Mann,and Peterson,The Semiconductor Supply Chain.”25The numbers in

223、the following sections are from 2019,because barriers to entry in this market are extremely high and new entrants are rare.As a result,leading firms and market shares have not changed substantively in the intervening time.26 Varas et al.,“Strengthening the Global Semiconductor Supply Chain in an Unc

224、ertain Era.”27“Amkor Form 10-K,”SEC Filings,Amkor Technology,.28 This example taken from Khan,Mann,and Peterson,The Semiconductor Supply Chain.”Center for Security and Emerging Technology|38 29 Numbers presented in this table are from 2019.In 2021,Quik-Pack changed its name to QP Technologies.30“Amk

225、or Form 10-K,”SEC Filings,Amkor Technology,12.31 Lapedus,“Expanding Advanced Packaging Production in the U.S.”32 Varas et al.,“Strengthening the Global Semiconductor Supply Chain in an Uncertain Era,”31.33 Hunt,“Sustaining U.S.Competitiveness in Semiconductor Manufacturing.”34 Lapedus,“Expanding Adv

226、anced Packaging Production in the U.S.”35 Roll Call Vote 117th Congress:1st Session on S.1260(Endless Frontier Act),June 8,2021,https:/www.senate.gov/legislative/LIS/roll_call_votes/vote1171/vote_117_1_00226.htm;United States Innovation and Competition Act of 2021,H.R.4521,117th Cong.(2021),https:/w

227、ww.congress.gov/bill/117th-congress/house-bill/4521.36 United States Innovation and Competition Act of 2021,Sec.1002(a)(3)(A).37 United States Innovation and Competition Act of 2021,Sec.1002(a)(2)(A).38 Kumar,Chitoraga,and Shoo,“Status of the Advanced Packaging Industry 2021,”24.39“Intel Comments on

228、 Tariff List 2,”Comment ID USTR-2018-0018-0566,Office of the United States Trade Representative,July 25,2018,https:/www.regulations.gov/comment/USTR-2018-0018-0566.40“Intel Form 10-K,”SEC Filings,Intel,2020,87,https:/ Technology Announces Plans to Expand Advanced Packaging Technology Capacity with N

229、ew Factory in Bac Ninh,Vietnam,”Yahoo,November 4,2021,https:/ One recent estimate put this variance at only 3.4 percent,however.Scotten Jones,“Cost Analysis of the Proposed TSMC US Fab,”SemiW,May 19,2020,https:/ See,for example,TSMCs front and back-end fabs being located in the same science parks in

230、 Taiwan:“TSMC Fabs,”TSMC,https:/ Form 10-K,”SEC Filings,TTM Technologies,https:/ Kumar,Chitoraga,and Shoo,“Status of the Advanced Packaging Industry 2021,”245.Center for Security and Emerging Technology|39 46 Kumar,Chitoraga,and Shoo,“Status of the Advanced Packaging Industry 2021,”245.47 Varas et a

231、l.,“Strengthening the Global Semiconductor Supply Chain in an Uncertain Era.”48 Kumar,Chitoraga,and Shoo,“Status of the Advanced Packaging Industry 2021,”245.49 Kelly and Vardaman,“An Analysis of the North American Semiconductor and Advanced Packaging Ecosystem,”42.50 Kelly and Vardaman,“An Analysis

232、 of the North American Semiconductor and Advanced Packaging Ecosystem,”43.51 Kelly and Vardaman,“An Analysis of the North American Semiconductor and Advanced Packaging Ecosystem,”15,44.52“Sustio,Simmtechs First Large Scale Factory in Southeast Asias Construction,Goes Full Steam Ahead in Penang,”Mala

233、ysian Investment Development Authority(MIDA),December 30,2021,https:/www.mida.gov.my/media-release/sustio-simmtechs-first-large-scale-factory-in-southeast-asias-construction-goes-full-steam-ahead-in-penang/.53 Douglas Yu,“TSMC Packaging Technologies for Chiplets and 3D,”PowerPoint presentation(TSMC,

234、2021),https:/hc33.hotchips.org/assets/program/tutorials/2021%20HotChips%20TSMC%20Packaging%20Technologies%20for%20Chiplets%20and%203D_0819%20publish_public.pdf.54 Kumar,Chitoraga,and Shoo,“Status of the Advanced Packaging Industry 2021,”189.55“Amkor Form 10-K,”SEC Filings,Amkor Technology,4.56 E.Jan

235、 Vardaman,“Too Many Package Options:What Makes Sense for Your Application?”PowerPoint presentation(TechSearch International,2021),https:/hc33.hotchips.org/assets/program/tutorials/TechSearchInternational_TutorialHotChips%20FINAL.pdf.57“Leaders in Semiconductors,Packaging,IP Suppliers,Foundries,and C

236、loud Service Providers Join Forces to Standardize Chiplet Ecosystem,”Business Wire,March 2,2022,https:/ Electronics Packaging Society,Institute of Electric and Electronic Engineers,https:/eps.ieee.org/technology/definitions.html.59 Chapter 1,“HIR Overview and Executive Summary,”Heterogeneous Integra

237、tion Roadmap,2019 edition.Center for Security and Emerging Technology|40 60 Kelly and Vardaman,“An Analysis of the North American Semiconductor and Advanced Packaging Ecosystem,”36.61 Samuel K.Moore,“Intels View of the Chiplet Revolution,”IEEE Spectrum,April 12,2019,https:/spectrum.ieee.org/intels-v

238、iew-of-the-chiplet-revolution.62 Raja Swaminathan,“Advanced Packaging:Enabling Moores Laws Next Frontier through Heterogeneous Integration,”PowerPoint presentation,slide 19(AMD,2021),https:/hc33.hotchips.org/assets/program/tutorials/2021%20Hot%20Chips%20AMD%20Advanced%20Packaging%20Swaminathan%20Fin

239、al%20%2020210820.pdf.63 Heterogeneous Integration Roadmap,2021 edition,”IEEE Electronics Packaging Society,https:/eps.ieee.org/technology/heterogeneous-integration-roadmap/2021-edition.html.64“Worldwide Advanced Packaging Industry to 2027:By Technology,End-user,Application,Product,and Geography.”65

240、Stefan Chitoraga and Favier Shoo,“Fan-out WLP and PLP Technologies 2021”(Yole Dveloppement,September 2021),43.66“InFO(Integrated Fan-Out)Wafer Level Packaging,”TSMC,https:/ Chitoraga and Shoo,“Fan-out WLP and PLP Technologies 2021,”29.68 Sean Lie,“Wafer Scale Engine:Why We Need Big Chips for Deep Le

241、arning,”Cerebras,August 28,2019,https:/ Chitoraga and Shoo,“Fan-out WLP and PLP Technologies 2021,”49.70“Argonne National Laboratory,”Cerebras,https:/ Announces Enhanced Portfolio of Systems for Advanced Packaging,”Cision PR Newswire,September 21,2020,https:/ Pavel Alpeyev and Yuki Furukawa,“Eighty-

242、Year-Old Japanese Firm May Be Key to Next-Gen Chips,”Bloomberg,June 29,2021,https:/ Kelly and Vardaman,“An Analysis of the North American Semiconductor and Advanced Packaging Ecosystem,”42.74“Wafer-Level Packaging,”Applied Materials,https:/ for Security and Emerging Technology|41 75 Kelly and Vardam

243、an,“An Analysis of the North American Semiconductor and Advanced Packaging Ecosystem,”42.76 Kelly and Vardaman,“An Analysis of the North American Semiconductor and Advanced Packaging Ecosystem,”112.77 Kumar,Chitoraga,and Shoo,“Status of the Advanced Packaging Industry 2021,”70.78 For example,see“Loc

244、ations:Asia,”Texas Instruments,https:/ Mihir P.Torsekar and John VerWey,“East Asia-Pacifics Participation in the Global Value Chain for Electronic Products,”United States International Trade Commission Journal of International Commerce and Economics(July 2019),https:/www.usitc.gov/publications/332/j

245、ournals/east_asia-pacifics_participation_in_the_global_value_chain_for_electronic_products.pdf.80 Kumar,Chitoraga,and Shoo,“Status of the Advanced Packaging Industry 2021,”66.81“Advanced Packaging Solutions”(USHIO Inc.,2013),https:/www.ushio.co.jp/documents/NEWS/products/20130708/ushio_product_data_

246、sheet_20130708_e.pdf.82 Kelly and Vardaman,“An Analysis of the North American Semiconductor and Advanced Packaging Ecosystem,”44.83 Kelly and Vardaman,“An Analysis of the North American Semiconductor and Advanced Packaging Ecosystem,”44.84 Kelly and Vardaman,“An Analysis of the North American Semico

247、nductor and Advanced Packaging Ecosystem,”55.85 Kelly and Vardaman,“An Analysis of the North American Semiconductor and Advanced Packaging Ecosystem,”46.86 Gijong Lee,“Intel Offers to Invest in FC-BGA to Samsung Electro-Mechanics to Procure More,”The Elec,May 11,2021,http:/ John VerWey,“Chinese Semi

248、conductor Industrial Policy:Prospects for Future Success,”United States International Trade Commission Journal of International Commerce and Economics(August 2019),https:/www.usitc.gov/sites/default/files/publications/332/journals/chinese_semiconductor_industrial_policy_prospects_for_success_jice_au

249、g_2019.pdf;John VerWey,“Chinese Semiconductor Industrial Policy:Past and Present,”United States International Trade Commission Journal of International Commerce And Economics(July 2019),https:/www.usitc.gov/publications/332/journals/chinese_semiconductor_industrial_policy_past_and_present_jice_july_

250、2019.pdf.Center for Security and Emerging Technology|42 88 Khan,Mann,and Peterson,The Semiconductor Supply Chain,”24.89 Dan Rosso,“SIA Comments to USTR on Section 301 Tariff Exclusions,”Semiconductor Industry Association(SIA),December 2,2021,https:/www.semiconductors.org/resources/sia-comments-to-us

251、tr-on-section-301-tariff-exclusions/.90 Varas et al.,“Strengthening the Global Semiconductor Supply Chain in an Uncertain Era,”31.91“Locations,”Onsemi,https:/ Locations,”Qorvo,https:/ Kumar,Chitoraga,and Shoo,“Status of the Advanced Packaging Industry 2021,”68.93 Kumar,Chitoraga,and Shoo,“Status of

252、the Advanced Packaging Industry 2021,”112.94 Che Pan,“SMIC Urges Chinas Chipmakers to Embrace Advanced Packaging As Moores Law Slows Nanometre Node Progress and U.S.Sanctions Bite,”Yahoo(originally from South China Morning Post),January 25,2021,https:/ and JCET Establish a Joint Venture to Build Chi

253、nas Local IC Manufacturing Supply Chain,”SMIC,February 20,2014,https:/ Chipmaker SMIC to Raise$6.55 Billion in Shanghai Share Sale,”Reuters,July 5,2020,https:/ Kumar,Chitoraga,and Shoo,“Status of the Advanced Packaging Industry 2021,”217.98 China Trinity,http:/ Kelly and Vardaman,“An Analysis of the

254、 North American Semiconductor and Advanced Packaging Ecosystem,”46.100“格隆滙,“深南電路(002916.SZ)：擬以 2 億元在廣州設子公司 以建 FC-BGA 封裝基板項目,”Moomoo,June 23,2021,https:/ Tang Shihua,“Chinas Shennan Circuits Surges after Revealing USD926 Million Substrate Plans,”YiCai,June 24,2021,https:/ Khan,Mann,and Peterson,The S

255、emiconductor Supply Chain,”24.103“Amkor Form 10-K,”SEC Filings,Amkor Technology,87.Center for Security and Emerging Technology|43 104 Lapedus,“Expanding Advanced Packaging Production in the U.S.”105 Kumar,Chitoraga,and Shoo,“Status of the Advanced Packaging Industry 2021,”66.106 Kelly and Vardaman,“

256、An Analysis of the North American Semiconductor and Advanced Packaging Ecosystem,”53.107 Khan,Mann,and Peterson,The Semiconductor Supply Chain,”8.108“Wafer-Level Packaging,”Applied Materials.109 TTM Technologies,http:/ Kelly and Vardaman,“An Analysis of the North American Semiconductor and Advanced

257、Packaging Ecosystem,”15,47.111“SkyWater Expanding with Florida Facility to Accelerate Domestic Advanced Packaging Capabilities for Microelectronics Manufacturing,”SkyWater,January 26,2021,https:/ Grumman Establishes New Microelectronics Packaging Facility for Next-Generation Defense Applications,”Northrop Grumman,October 26,2021,https:/ Wins U.S.Government Project to Develop Leading-Edge Foundry Ecosystem,”Intel,August 23,2021,https:/ to Invest$3.5 Billion to Expand New Mexico Manufacturing Operations,”Intel,May 3,2021,https:/