25.d2s4-2-aug22-RISC-V Summit China 2023 - Enhance UEFI on RISC-V.pdf

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1、RISC-V Summit China 2023Enhance UEFI on RISC-VYong Li()Andrei Warkentin()Aug.23 2023 MultiArchUefiPkg-Bringing RISC-V and IHV Ecosystems Together StandaloneMmPkg-Bringing UEFI Secure Execution to RISC-VIntel ConfidentialDepartment or Event Name2RISC-V summit China 20232Legal Notices and DisclaimersS

2、tatements in this document that refer to future plans or expectations are forward-looking statements.These statements are based on current expectations and involve many risks and uncertainties that could cause actual results to differ materially from those expressed or implied in such statements.For

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5、l or otherwise)to any intellectual property rights is granted by this document.Intel Corporation.Intel,the Intel logo,and other Intel marks are trademarks of Intel Corporation or its subsidiaries.Other names and brands may be claimed as the property of others.This document contains information on pr

6、oducts and/or processes in development.Intel ConfidentialDepartment or Event Name3RISC-V Summit China 20233MultiArchUefiPkg-Bringing RISC-V and IHV Ecosystems Togetherv Today Non-standard RISC-V platforms,that dont lend to building to horizontal market segments where interoperability is keyv Tomorro

7、w An interoperable RISC-V ecosystem that allows building servers and PCsHow to make existing PCIe devices work?Will future PCIe devices ship with RISC-V firmware drivers?Intel ConfidentialDepartment or Event Name4RISC-V Summit China 20234MultiArchUefiPkg Option ROM EmulationStatus:v 64-bit x64 and A

8、Arch64 instruction emulationv Supports 64-bit RISC-V UEFI hostsv Abstracts Qemu/TCG with Unicorn Engine APIv Verified on RiscVVirt w/PCIE passthrough v Verified on VisionFive2 SBCHomepage and Source Code:v https:/wiki.riseproject.dev/display/HOME/EDK2_00_01+-+MultiArchUefiPkgv https:/ Step:v Verify

9、on more platformsv Correctness,perf,code size and etcIntel ConfidentialDepartment or Event Name5RISC-V Summit China 20235StandaloneMmPkg Bringing UEFI Secure Execution to RISC-Vv UEFI Secure Execution Environment A software sandbox environment running in the Secure World,under the control of privile

10、ged software,to instantiate PI Standalone Management Mode,in order to execute MM(secure)services.v Typical Use Case UEFI secure boot service do the authentication and update variables for ensuring that code launched by the UEFI firmware is trusted and that each efi payload loaded is authenticated.Ho

11、w to ensure the UEFI Secure Execution on RISC-V is secure?How will the secure implementation be on RISC-V based servers and PCs?Intel ConfidentialDepartment or Event Name6RISC-V Summit China 20236StandaloneMmPkg UEFI Secure ServiceStatus:v Supports both PMP/sPMP and CoVE based TEEv Prototyped with P

12、englai and Salus on QEMUv Verified UEFI secure variables servicev Verified UEFI secure boot flowHomepage and Source Code:v https:/wiki.riseproject.dev/display/HOME/EDK2_00_02+-+StandaloneMmPkgv https:/ Step:v UEFI PI and BRS-I updatev Code upstream,port to real hardware platformv Secure firmware upg

13、rade,management services.Intel ConfidentialDepartment or Event Name7RISC-V Summit China 20237RISE is focused on positive and transparent collaborations with upstream projects to deliver commercial-ready software for various use casesv RISE Firmware WGhttps:/wiki.riseproject.dev/display/HOME/Firmware

14、+WGv UEFI on RISC-V Firmware Mailing Listhttps:/ More projects Intel China team is working on-https:/riseproject.devhttps:/ Vector Support on ValgrindAugust 25 6pmBest practice to optimize SW with vectorization on RISC-VPosterRISC-V firmware solutionAugust 24 4:30pmEnhance UEFI on RISC-VAugust 24 4:20pmEnabling compliance test for RISC-V BRSAugust 24 3pm The ACRN/RISC-V project:embedded hypervisor design and status updateAugust 24 5pmWelcome to Join RISC-V UEFI Firmware Development andFeedback Needed!