會議10_使用 CXL 實現系統可組合性.pdf

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1、System Composability Using CXLKurtis Bowman,Marketing Working Group Co-Chair,CXL ConsortiumMitch Wright,CXL System Architect,Liqid2024 OFA Virtual WorkshopRouterWirelessInterconnectMobileNetworksInter DC linksCore/EdgeNetworkSpine SwitchLeaf SwitchTOR SwitchWANDATA CENTERRACKPACKAGEDIERACKRACKRACKRA

2、CKRACKRACKData centerInterconnectSoCInterconnectNODEProcessorInterconnectCXL 1.1Single NodeCoherent interconnectData Center:Expanding Scope of CXLCXL 3.0/3.1Composable Fabric growth for disaggregation/pooling/accelerator Multiple Nodes inside a Rack/Chassis supporting pooling of resourcesCXL 2.0Comp

3、ute Express Link and CXL are registered trademarks of the Compute Express Link Consortium.CXL Specification Feature SummaryFeaturesCXL 1.0/1.1CXL 2.0CXL 3.0CXL 3.1Release date20192020August 2022November 2023Max link rate 32GTs32GTs64GTs64GTsFlit 68 byte(up to 32 GTs)Flit 256 byte(up to 64 GTs)Type 1

4、,Type 2 and Type 3 Devices Memory Pooling w/MLDs Global Persistent Flush CXL IDE Switching(Single-level)Switching(Multi-level)Direct memory access for peer-to-peer Enhanced coherency(256 byte flit)Memory sharing(256 byte flit)Multiple Type 1/Type 2 devices per root port Fabric capabilities(256 byte

5、flit)Fabric Manager API definition for PBR Switch Host-to-Host communication with Global Integrated Memory(GIM)concept Trusted-Execution-Environment(TEE)Security Protocol Memory expander enhancements(up to 34-bit of meta data,RAS capability enhancements)Compute Express Link and CXL are registered tr

6、ademarks of the Compute Express Link Consortium.Supported Not Supported4CXL 3.1 Fabric Management FeaturesCompute Express Link and CXL are registered trademarks of the Compute Express Link Consortium.Fabric Decode/Routing requirements Host-to-Host communication with Global Integrated Memory(GIM)conc

7、ept Direct P2P.mem support through PBR Switches Adds symmetric Link Layer definition Enables direct caching of CXL.mem for an accelerator,which is not possible with Unordered IO(UIO)Fabric Manager API definition for PBR SwitchCXL 3.1 Fabric Management FeaturesCompute Express Link and CXL are registe

8、red trademarks of the Compute Express Link Consortium.5CXL 3.1:Fabric Management FeaturesPort-Based Routing(PBR)compared to Hierarchy-Based Routing(HBR)Support fabric topologies other than tree topologies that HBR switches offerAddress-based,non-prescriptive routing for large memory fabricsSupports

9、tree,mesh,ring,star,butterfly,and multi-dimensional topologiesCompute Express Link and CXL are registered trademarks of the Compute Express Link Consortium.HostHostCXLCXL HBR SwitchCXL HBR SwitchCXL HBR SwitchCXL HBR SwitchType-3 CXL MemType-3 CXL MemType-3 CXL MemType-3 CXL MemType-3 CXL MemType-3

10、CXL MemCXL PBR SwitchHostHostHostHostHostHostHostHostCXL PBR SwitchCXL PBR SwitchCXL PBR SwitchCXL PBR SwitchType-1/2/3 CXL DeviceType-1/2/3 CXL DeviceType-1/2/3 CXL DeviceType-1/2/3 CXL DeviceType-1/2/3 CXL DeviceType-1/2/3 CXL DeviceType-1/2/3 CXL DeviceType-1/2/3 CXL DeviceHost to Fabric-Attached

11、 Memory(FAM)communication with Global Integrated Memory(GIM)Multiple Hosts mapping CXL Fabric-Attached Memory devicesHosts and FAM devices can initiate cross-domain accesses to GIMGIMGIM CXL Fabric HostAcceleratorHostAcceleratorAccelerator HostFM Host GIMGIMGIMType-3 CXL Mem GIMCXLCXLCompute NodeGIM

12、 Cross-domain accessCompute Express Link and CXL are registered trademarks of the Compute Express Link Consortium.CXL 3.1:Fabric Management FeaturesHost-to-Host communication with Global Integrated Memory(GIM)conceptType-3 CXL MemCXLCXL FM API CPU BMCRedfish CXL FM API CXL FM API CXL FM API CXL Fabr

13、icAcceleratorFMType-3 CXL MemCXLCXLDSPDSPDirect P2PCompute Express Link and CXL are registered trademarks of the Compute Express Link Consortium.CXL 3.1:Fabric Management FeaturesDirect peer-to-peer(P2P).mem support for Accelerators through PBR SwitchesDirect P2P CXL.mem for AcceleratorsEnables acce

14、lerator access to peer Type-3 memoryThe accelerator and Type-3 device must each be directly connected to an Edge Downstream Port(DSP)Utilizes port-based routing(PBR)for transactionsCXL FM API CXL FM API Compute Express Link and CXL are registered trademarks of the Compute Express Link Consortium.CXL

15、 3.1:Fabric Management FeaturesFabric Manager(FM)API definition for PBR SwitchHostHost CXLCXL PBR FabricFabric Manager Type-1/2/3Type-1/2/3Type-1/2/3Type-1/2/3Type-1/2/3Type-1/2/3CXL FM API CXL Device Enclosure CPU BMCRedfish CPU BMCRedfish CXL Fabric Management Integration with Industry Standards D

16、MTF Redfish Redfish Support for CXL CXL to Redfish Mapping Specification SNIA Swordfish SNIA Swordfish Specification What is the SNIA Swordfish Standard OFA Sunfish OFA SunfishCXL 3.1 Fabric Management FeaturesCompute Express Link and CXL are registered trademarks of the Compute Express Link Consortium.10Thank Youwww.ComputeExpressLink.org