1B-101_eFPGAs Bring the Advantages of Programmable Logic to SmartNICs- FLEX LOGIX.PDF

1、 2022 FLEX LOGIXRalph Grundler,Sr.Director MarketingApril 2022eFPGAs Bring the Advantages of eFPGAs Bring the Advantages of Programmable Logic to Programmable Logic to SmartNICsSmartNICseFPGA LUTs Will Outship FPGA by the End of the DecadeeFPGA LUTs Will Outship FPGA by the End of the DecadeFlex You

2、r Computing 2022 FLEX LOGIX 2022 FLEX LOGIXFPGA has become a strategic technology 2022 FLEX LOGIX 2022 FLEX LOGIXData Centers use FPGAs in Volume to Data Centers use FPGAs in Volume to Provide Parallel Programmability Provide Parallel Programmability 2022 FLEX LOGIX 2022 FLEX LOGIXCommunication Syst

3、ems Leverage FPGAs for Hundreds of National Frequency Bands 2022 FLEX LOGIXReprogrammability has become a requirement 2022 FLEX LOGIXPower Problem of FPGA 2022 FLEX LOGIXHow to Reduce Power?2022 FLEX LOGIXIntegration Has Just BegunBusesMCUAFEDSPHardwiredRTLSRAMAnalogeFPGA180nm to 5nmSOC 2022 FLEX LO

4、GIXNICs:Reprogrammable Packet ProcessorWill Benefit from IntegrationHigh SpeedEthernetManagement EthernetTrafficManagementCPUVirtualized Device FunctionsFPGAReconfigure for Reconfigure for different offloadsdifferent offloads7High SpeedEthernetManagement EthernetTrafficManagementCPUVirtualized Devic

5、e FunctionseFPGAIntegrated into the SOCIntegrated into the SOC Lower Power Less Latency Smaller Size Less Cost 2022 FLEX LOGIXeFPGA Chiplets Provide Rapid Solutions8 2022 FLEX LOGIXFlex Logix:Smaller,Faster XFLXInterconnectHigh logic density and performance:Similar to FPGA chipsHigh utilization：90%+

6、Designed for ease of integrationPure logic process based on std cell:Quickly port to new processUsing only lower metal stacks Traditional Mesh Network Traditional Mesh Network(79%)XFLXXFLX Network Network(63%)LUT LogicLUT Logic(21%)LUT LogicLUT Logic(37%)45%smaller45%smallerCE1CE2CE3CE4CE5CE6CE7CE8

7、2022 FLEX LOGIXCE1CE2CE3CE4CE5CE6CE7CE8eFPGA Used in MicrocontrollerEFLX4K 1x1 eFPGA ArrayTX/RX pinsCMOSpins1Kx32 Dual-port SRAMs(3 ea.)ARM7coreSRAMSPIInterrupts&TimersAHB PortAddress Decode/MPUExternal MemoryGPIOARM7coreSRAMSPIInterrupts&TimersAHB PortAddress Decode/MPUExternal MemoryGPIOGPIO(103 e

8、a.)Configuration&StartupExternalMemorySerial BusNodes(2 ea.)2022 FLEX LOGIXVehicle to Vehicle CommunicationVehicle to Vehicle Communication 2022 FLEX LOGIXMorningCore 2022 FLEX LOGIXeFPGAs are Ultra-Low-Power“small,low-cost FPGAs that sip microwatts in standby mode”2022 FLEX LOGIXHigh Speed eFPGA fo

9、r 5GHigh Speed eFPGA for 5G 2022 FLEX LOGIX“The demands of 5G require“The demands of 5G require higher performance while higher performance while reducing system power and reducing system power and cost,“Yutaka Hayashi,Vice cost,“Yutaka Hayashi,Vice President of SocionextPresident of Socionext 2022

10、FLEX LOGIXOpportunity to Re-think the eFPGA Programming Strategy 2022 FLEX LOGIXTake software control over the eFPGA 2022 FLEX LOGIXIntegrating FPGA Allows for Greater ControlCLKDinDQQDDoutVerilog RTL CodeVerilog RTL CodeFPGA FabricFPGA FabricIO RBBDin_iDout_i 2022 FLEX LOGIXContainerize Code Into“S

11、ubroutines”Basic ContainerBasic ContainerEFLX CoreBRAMSys.Bus Master/Slave WrappersEFLX CoreBRAMSys.Bus Master/Slave WrappersEFLX CoreBRAMSys.Bus Master/Slave WrappersEFLX CoreBRAMSys.Bus Master/Slave WrappersEFLX CoreBRAMSys.Bus Master/Slave WrappersEFLX CoreBRAMSys.Bus Master/Slave WrappersEFLX Co

12、reBRAMSys.Bus Master/Slave WrappersEFLX CoreBRAMSys.Bus Master/Slave WrappersSystem Interconnect/NoCEFLX IP InterfaceSystem Interconnect/NoCEFLX IP InterfaceSys.Bus Master/Slave WrappersSys.Bus Master/Slave WrappersSys.Bus Master/Slave WrappersSys.Bus Master/Slave WrappersSystem Interconnect/NoCEFLX

13、 IP InterfaceContainer ArrayContainer ArrayAccess to Memory and ProcessorAccess to Memory and ProcessorAccess to Memory and ProcessorAccess to IO MatrixAccess to IO MatrixAccess to IO MatrixAccess to Memory and Processor 2022 FLEX LOGIXEasy to Build Large Arrays of Containers 2022 FLEX LOGIXContaine

14、rs are Variable in Size 2022 FLEX LOGIXExamples of Containerized AcceleratorsBRAMSys.Bus WrappersNoCEFLX IP InterfaceAESEncryptionBRAMSys.Bus WrappersNoCEFLX IP InterfaceLWZCompressionBRAMSys.Bus WrappersNoCEFLX IP InterfaceBRAMSys.Bus WrappersLWZCompressionSHAEncryptionBRAMSys.Bus WrappersNoCEFLX I

15、P InterfaceBRAMSys.Bus WrappersAESEncryptionSHAEncryptionBRAMSys.Bus WrappersNoCEFLX IP InterfaceBRAMSys.Bus WrappersLWZCompressionSHAEncryptionBRAMSys.Bus WrappersNoCEFLX IP InterfaceBRAMSys.Bus WrappersUDPIP 1G/10G 4 Channel Network Stack 2022 FLEX LOGIXSoftware Programming ModelAES(Filename,param

16、eters)BRAMSys.Bus WrappersNoCEFLX IP InterfaceAESEncryptionLoad(AES)AES Software Hardware Loaded with One Line of Code 2022 FLEX LOGIXeFPGA Programmed in Microseconds Millionths of a SecondMillionths of a SecondAESEncryptionLWZCompressionLWZCompressionSHAEncryptionAESEncryptionSHAEncryptionLWZCompre

17、ssionSHAEncryptionUDPIP 1G/10G 4 Channel Network Stack 2022 FLEX LOGIXeFPGA Programmed in Microseconds Millionths of a SecondMillionths of a SecondAESEncryptionLWZCompressionLWZCompressionSHAEncryptionAESEncryptionSHAEncryptionLWZCompressionSHAEncryptionUDPIP 1G/10G 4 Channel Network Stack 2022 FLEX

18、 LOGIXeFPGA Programmed in Microseconds Millionths of a SecondMillionths of a SecondAESEncryptionLWZCompressionLWZCompressionSHAEncryptionAESEncryptionSHAEncryptionLWZCompressionSHAEncryptionUDPIP 1G/10G 4 Channel Network Stack 2022 FLEX LOGIXeFPGA Programmed in Microseconds Millionths of a SecondMil

19、lionths of a SecondAESEncryptionLWZCompressionLWZCompressionSHAEncryptionAESEncryptionSHAEncryptionLWZCompressionSHAEncryptionUDPIP 1G/10G 4 Channel Network Stack 2022 FLEX LOGIXProcessor controls the Modular eFPGA25Processor SubsystemSRAMDRAM Controller/CacheLWZCompressionSHAEncryptionAESEncryption

20、SHAEncryptionLWZCompressionSHAEncryptionUDPIP 1G/10G 4 Channel Network Stack 2022 FLEX LOGIXReprogrammable Packet Processorwith Fast Paging eFPGAReconfigure for Reconfigure for different offloadsdifferent offloads26High SpeedEthernetManagement EthernetTrafficManagementCPUVirtualized Device Functions

21、eFPGAFast Paging for Fast Paging for different offloadsdifferent offloads 2022 FLEX LOGIXUse Software to reprogram HardwareIntegrate eFPGAIntegrate eFPGAGreater Compute Density per Rack Less Power&HeatLess Latency and Less cost 2022 FLEX LOGIX 2022 FLEX LOGIX#1 eFPGA IP ProviderMature eFPGA Products

22、32 Projects using eFPGAMore than half working in Si Many more in the pipeline17 LicenseesMultiple customers doing multiple chipsMost broadly availableProcesses portability from 180nm 3nmMultiple EFLX products1K 2M LUT FPGA capacities21x21mm fcBGAMorningCore 2022 FLEX LOGIXEFLX eFPGA AvailabilityEarl

23、y IP drops available for concurrent designProduct Briefs availableTSMCTSMCProductProductLogicLogicDSPDSP40ULP/EF/LP*EFLX 1KSilicon ProvenSilicon ProvenIn PlanningIn Planning28HPC/HPC+/22ULP/ULL*EFLX 4KSilicon ProvenSilicon ProvenSilicon ProvenSilicon Proven16FFC/FFC+/12FFC/FFC+*EFLX 4KSilicon Proven

24、Silicon ProvenSilicon ProvenSilicon ProvenN7/6*EFLX 4KIn DesignIn DesignIn DesignIn DesignN5EFLX 4KIn PlanningIn PlanningIn PlanningIn PlanningGlobalFoundriesGlobalFoundries22FDXEFLX 4KIn DesignIn DesignIn DesignIn Design12LP/12LP+*RHBD available(standard and w/external power gating)EFLX 4KSilicon ProvenSilicon ProvenSilicon ProvenSilicon ProvenOtherOtherSandia 180EFLX 4KSilicon ProvenSilicon Proven 2022 FLEX LOGIXflex-Thank YouFlex Your Computing#1 eFPGA IP Provider