SESSION 19 - RF to mm-Wave Oscillators and Multipliers.pdf

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1、ISSCC 2024SESSION 19RF to mm-Wave Oscillators and Multipliers 2024 IEEE International Solid-State Circuits Conference1 of 4919.1:A 7.5GHz Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc Reference SpurA 7.5GHz Subharmonic Injection-Locked Clock Multipl

2、ier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc Reference SpurHangil Choi,SeongHwan ChoKAIST,Daejeon,Korea 2024 IEEE International Solid-State Circuits Conference2 of 4919.1:A 7.5GHz Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc Reference Spu

3、r Motivation Proposed SILCM-Reset&Recover-Calibration Implementation Measurement Results ConclusionOutline 2024 IEEE International Solid-State Circuits Conference3 of 4919.1:A 7.5GHz Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc Reference Spur Motiv

4、ation Proposed SILCM-Reset&Recover-Calibration Implementation Measurement Results ConclusionOutline 2024 IEEE International Solid-State Circuits Conference4 of 4919.1:A 7.5GHz Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc Reference SpurVCO(=VC)INJt-

5、GmINJVCO+-VC VC=0 by INJSubharmonic Injection-Locked Clock Multiplier(SILCM)Injection makes VC=0.Align VCO phase.2024 IEEE International Solid-State Circuits Conference5 of 4919.1:A 7.5GHz Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc Reference Spur

6、Ideal Case:Impulse InjectionInjection VC=0.No energy loss in LC tank.Impulse InjectionVCOINJINJVCO(VC)0-GmINJVCO+-from 0 to 0VC 2024 IEEE International Solid-State Circuits Conference6 of 4919.1:A 7.5GHz Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc

7、 Reference SpurNon-zero Time InjectionVCOINJINJVCO(VC)0-GmINJVCO+-VCfrom 0 to 0Practical Case:Non-zero Time InjectionInjection VC 0.Energy loss in LC tank.:Waveform is distorted.Impulse InjectionVCOINJINJVCO(VC)0-GmINJVCO+-from 0 to 0VC 2024 IEEE International Solid-State Circuits Conference7 of 491

8、9.1:A 7.5GHz Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc Reference SpurProblem of VCO Waveform DistortionReference spur induced.VCONVCOPChange in VCO freq.Due tocap.change 2024 IEEE International Solid-State Circuits Conference8 of 4919.1:A 7.5GHz

9、 Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc Reference SpurVCONVCOPChange in VCO freq.BUFOUTDue tocap.changeDue to change in VCO slopeVCOChange in buffer delayINJReference spur induced.Problem of VCO Waveform Distortion 2024 IEEE International Sol

10、id-State Circuits Conference9 of 4919.1:A 7.5GHz Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc Reference SpurOutline Motivation Proposed SILCM-Reset&Recover-Calibration Implementation Measurement Results Conclusion 2024 IEEE International Solid-Stat

11、e Circuits Conference10 of 4919.1:A 7.5GHz Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc Reference SpurConventional SILCM-GmVCOOUTRSTEnergy lossRSTWaveform distortionNoiseremovalVCOOperation of Proposed SILCM:1.ResetSame as conventional injection.Ph

12、ase noise reduced,but waveform distorted due to energy loss.2024 IEEE International Solid-State Circuits Conference11 of 4919.1:A 7.5GHz Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc Reference SpurConventional SILCM-GmVCOOUTVRECRSTRECEnergyrestorati

13、onVCORSTRECWaveform recoveryVRECOperation of Proposed SILCM:2.RecoverTank energy is restored by connecting VCO to recovery voltage VREC.VCO waveform is recovered.2024 IEEE International Solid-State Circuits Conference12 of 4919.1:A 7.5GHz Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz

14、Reference,-259.7dB FoMJ,and-56.6dBc Reference SpurVCORSTRECWaveformdistortionVRECConventional SILCM-GmVCOOUTVRECRSTRECIssue.Inaccurate Restoration of Energy in LC tankRecovery voltage VREC must be accurate.If not,waveform is distorted after injection.2024 IEEE International Solid-State Circuits Conf

15、erence13 of 4919.1:A 7.5GHz Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc Reference SpurConventional SILCM-GmVCOOUTReferenceSpur monitoringVRECRSTRECVCOAdjusted RSTRECAccurate recoveryVRECSolution.Calibration using Reference Spur MonitoringVREC is a

16、djusted to minimize reference spur.2024 IEEE International Solid-State Circuits Conference14 of 4919.1:A 7.5GHz Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc Reference SpurVCONVCOPNo change in VCO freq.Constant VCO slopeNo change in buffer delayCons

17、tant CAPBUFOUTVCOINJVCO waveform recovery.Low reference spur.Advantage of Proposed SILCM 2024 IEEE International Solid-State Circuits Conference15 of 4919.1:A 7.5GHz Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc Reference SpurVCONVCOPRSTRECRSTVCOPVR

18、ECPRECVRECNVCONRECVRECPVRECNDifferential VCOBoth VCOPand VCONneed to be recovered.2024 IEEE International Solid-State Circuits Conference16 of 4919.1:A 7.5GHz Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc Reference SpurVCONVCOPRECNRECPtd errRSTVCOPV

19、RECPRECVRECNVCONRECNRECP+tdResetRECIssue:Phase error between VCO signals(err)Delay difference(td)between recovery pulses(RECP&RECN)induces phase error in the recovered waveform.2024 IEEE International Solid-State Circuits Conference17 of 4919.1:A 7.5GHz Subharmonic Injection-Locked Clock Multiplier

20、with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc Reference SpurVCONVCOPRECNRECPRSTVCOPVRECPRECVRECNVCONRECNRECPsame delayResetRECDTC+td err=0tdSolution:Compensation of Delay DifferenceDTC compensates for the delay difference td&makes err=0.2024 IEEE International Solid-State Circuits Conference18

21、of 4919.1:A 7.5GHz Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc Reference Spur3 variables must be adjusted accurately.Variables to Adjust for Waveform RecoveryVCOPVCONRECPRSTRECNVRECPVRECNRECPDTCDDTCtd 2024 IEEE International Solid-State Circuits C

22、onference19 of 4919.1:A 7.5GHz Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc Reference SpurVCOPVCONRECPRSTRECNVDDDRPDRNVSSRPRNDTCRECPDDTCtdVariable resistors&fixed supply voltages(VDD,VSS)are employed instead of recovery voltages.Proposed SILCMs Rec

23、overy Variables:td,RP,RN 2024 IEEE International Solid-State Circuits Conference20 of 4919.1:A 7.5GHz Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc Reference SpurOutline Motivation Proposed SILCM-Reset&Recover-Calibration Implementation Measurement

24、Results Conclusion 2024 IEEE International Solid-State Circuits Conference21 of 4919.1:A 7.5GHz Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc Reference SpurCalibration Targets to Minimize Reference SpurVCO frequency(fVCO),Phase error between VCO sig

25、nals(err),Restored energy in LC tanks(EVCOP,EVCON).VCONVCOPfVCOVCONEVCON errVCONVCOPVCOPEVCOP 2024 IEEE International Solid-State Circuits Conference22 of 4919.1:A 7.5GHz Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc Reference SpurVCOPVCONRECPRSTREC

26、NRECPRECNDTCDDTCDRNDRPVctrlCalibration ControlsVoltage of VCO varactor(Vctrl),Digital code of DTC(DDTC),Digital codes of variable resistors(DRP,DRN).VCONVCOPfVCOVCONEVCON errVCONVCOPVCOPEVCOP 2024 IEEE International Solid-State Circuits Conference23 of 4919.1:A 7.5GHz Subharmonic Injection-Locked Cl

27、ock Multiplier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc Reference SpurSILCM with CalibrationInterval Gen.:Generate VCO intervals for calibration.Waveform Recovery&fvcoCalibration:Calibrate variables.VCOPVCONRECPRSTRECNDRNDRPVctrlRECPDTCDDTCInjectionIntervalGen.CalibrationWaveform Recovery&

28、fvco CalibrationY 2024 IEEE International Solid-State Circuits Conference24 of 4919.1:A 7.5GHz Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc Reference SpurVCOPVCONRECPRSTRECNDRNDRPVctrlRECPDTCDDTCInjectionIntervalGen.CalibrationWaveform Recovery&fvc

29、o CalibrationYWaveform Recovery&fVCOCalibrationPulse width comparator is utilized for reference spur monitoring.TVCTVCPeriodGen.Reference spur monitoringPW0PW1V0V1YCPS SS SS SVctrlDDTCDRPDRNVariables calibration 2024 IEEE International Solid-State Circuits Conference25 of 4919.1:A 7.5GHz Subharmonic

30、 Injection-Locked Clock Multiplier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc Reference SpurOUTPW0PW1V0 V1T0T1V0V1Before INJCompareINJReference Spur Monitoring based on Pulse Width ComparatorThe pulse width of PW0&PW1 are compared.-PW0:VCO time interval before INJ./PW1:During or after INJ.H.

31、Kim,ISSCC16TVCTVCPeriodGen.Pulse Width Comparator PW0PW1V0V1OUT 2024 IEEE International Solid-State Circuits Conference26 of 4919.1:A 7.5GHz Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc Reference SpurVoffTVCTVCPeriodGen.CPPW0PW1V0V1OUTOUTPW0PW1V0 V

32、1T0T1V0V1Before INJBefore INJoffsetT0=T1INJCalibration:Calibrator Offset(Voff)PW1:Other VCO time interval before injection(T0=T1).2024 IEEE International Solid-State Circuits Conference27 of 4919.1:A 7.5GHz Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6

33、dBc Reference SpurVCOPVCONRECPRSTRECNRECPRECNDTCDDTCDRNDRPVctrlOUTPW0PW1V0 V1T0T1V0V1Before INJINJAccumulated freq.error appearsCalibration:VCO Frequency(fVCO)PW1:VCO time interval during injection.-Detects accumulated fVCOerror.VctrlTVCTVCPeriodGen.CPPW0PW1OUTV0V1 2024 IEEE International Solid-Stat

34、e Circuits Conference28 of 4919.1:A 7.5GHz Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc Reference SpurInterval GeneratorVarious VCO time intervals are needed to calibrate recovery variables.VCOPVCONRECPRSTRECNDRNDRPVctrlRECPDTCDDTCInjectionCalibrat

35、ionWaveform Recovery&fvco CalibrationYmid-thresholdhigh-thresholdlow-thresholdVCOPVCONIntervalGen.YP,LYN,MYN,H 2024 IEEE International Solid-State Circuits Conference29 of 4919.1:A 7.5GHz Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc Reference SpurV

36、COPVCONRECPRSTRECNRECPRECNDTCDDTCDRNDRPVctrlCalibration:Phase error between VCO signals(err)errcan be observed at VCO time interval after injection.OUTN,MVCONVCOP err TVCO=TVCOVCONOUTN,MMid-thresholdReset Recover err observed 2024 IEEE International Solid-State Circuits Conference30 of 4919.1:A 7.5G

37、Hz Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc Reference SpurOUTN,MVCONVCOP err TVCO=TVCOVCONOUTN,MMid-thresholdPW0PW1Avoid effect offreq.errorCalibration:Recovered Phase Error(err)PW1:VCO time interval after injection.-Observe err&Avoid effect of

38、 fvcoerror.VCOPVCONRECPRSTRECNRECPRECNDTCDDTCDRNDRPVctrl 2024 IEEE International Solid-State Circuits Conference31 of 4919.1:A 7.5GHz Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc Reference SpurOUTN,HVCON=TVCOVCONOUTN,MHigh-threshold TVCOHigh-thresh

39、oldVoltage amplitdue is converted totime intervalVCOPVCONRECPRSTRECNRECPRECNDTCDDTCDRNDRPVctrlCalibration:Recovered Tank Energy of VCON(EVCON)High-threshold buffer is utilized.-Converts voltage amplitude to time interval.2024 IEEE International Solid-State Circuits Conference32 of 4919.1:A 7.5GHz Su

40、bharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc Reference SpurOUTN,HVCON=TVCOVCONOUTN,MHigh-threshold TVCOPW0PW1VCOPVCONRECPRSTRECNRECPRECNDTCDDTCDRNDRPVctrlCalibration:Recovered Tank Energy of VCON(EVCON)PW1:VCO time interval after injection.2024 IEEE

41、International Solid-State Circuits Conference33 of 4919.1:A 7.5GHz Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference,-259.7dB FoMJ,and-56.6dBc Reference SpurOUTP,LVCON=TVCOVCOPOUTP,LLow-threshold 10dBcVf0-V3f0:-20to 20|Vf0|/|V3f0|:1.4 to 2.4519.2:A 12.4%Efficiency,11dBm Psat,Odd

42、-Harmonics-Recycling,62-to-92GHz CMOS Frequency QuadruplerUsing an Amplitude-Phase Coordinating Technique 2024 IEEE International Solid-State Circuits Conference18 of 36Amplitude-Phase Coordinating TechniqueThe proposed OHR quadrupler achieves high efficiency and wide coordinating range0.51.01.52.02

43、.53.00246Current(mA)|Vf0|/|V3f0|2nd 4th 6th 4th 20304050Efficiency(%)Efficiency 35%Vf0=V3f019.2:A 12.4%Efficiency,11dBm Psat,Odd-Harmonics-Recycling,62-to-92GHz CMOS Frequency QuadruplerUsing an Amplitude-Phase Coordinating Technique 2024 IEEE International Solid-State Circuits Conference19 of 36Inp

44、ut Matching CircuitOdd-Harm.GeneratorAmplitude-Phase CoordinatingBalancedSquare-Law MixerOutput BufferOutput(62-92GHz)Broadband High-K MatchingVDDVBias2VDDVBias3=0.65V Input(15.5-23GHz)VDDMiniatureCoupling Inductor 1m*32*3(Vf0+V3f0)2M5M6VBias1Broadband Voltage MatchingTop-Level Schematic of OHR Freq

45、uency Qradrupler19.2:A 12.4%Efficiency,11dBm Psat,Odd-Harmonics-Recycling,62-to-92GHz CMOS Frequency QuadruplerUsing an Amplitude-Phase Coordinating Technique 2024 IEEE International Solid-State Circuits Conference20 of 36Input(15.5-23GHz)Broadband Voltage MatchingBroadband Input/Output MatchingOutp

46、ut(62-92GHz)Broadband High-K Matching60728496-20-15-10-50|S11|(dB)Output Frequency(GHz)|S11|Meas.|S22|Meas.-25-20-15-10-5|S22|(dB)VoltageMatchingHigh-KMatching19.2:A 12.4%Efficiency,11dBm Psat,Odd-Harmonics-Recycling,62-to-92GHz CMOS Frequency QuadruplerUsing an Amplitude-Phase Coordinating Techniqu

47、e 2024 IEEE International Solid-State Circuits Conference21 of 36Conventional coupling inductors increase the occupied areaThe larger KSEof conventional coupling inductor,the larger of the occupied areaLSE=1.2454nHKSE=0.15LDM=2LSE(1-KSE)LSELSEMiniature Coupling InductorKSE19.2:A 12.4%Efficiency,11dB

48、m Psat,Odd-Harmonics-Recycling,62-to-92GHz CMOS Frequency QuadruplerUsing an Amplitude-Phase Coordinating Technique 2024 IEEE International Solid-State Circuits Conference22 of 36Common-mode coupling inductors decrease the occupied areaThe larger KSEof common-mode coupling inductor,the smaller of th

49、e occupied areaLSE=0.67nHKSE=0.58Coupling Inductor Reduces Area by 50%LDM=2LSE(1+KSE)KSELSELSEMiniature Coupling Inductor19.2:A 12.4%Efficiency,11dBm Psat,Odd-Harmonics-Recycling,62-to-92GHz CMOS Frequency QuadruplerUsing an Amplitude-Phase Coordinating Technique 2024 IEEE International Solid-State

50、Circuits Conference23 of 36Odd-Harmonics Generator CoreHarmonic load-pull enhances the Power of 3rd harmonicf0,3f0,5f0f0,3f0,5f0Load-Pull3f0M1M2C1C20180f0f0VBiasVBiasVDDVDDM1-2:24*1m*40nmC1-2:6.5fFVDD:0.9VVBias1:0.5V19.2:A 12.4%Efficiency,11dBm Psat,Odd-Harmonics-Recycling,62-to-92GHz CMOS Frequency

51、 QuadruplerUsing an Amplitude-Phase Coordinating Technique 2024 IEEE International Solid-State Circuits Conference24 of 36Odd Harm.are rejected by mixer.Balanced Square-Law MixerThe balanced square-law mixer collects odd harmonicsw/o LO/IF leaks M3-4:20*1m*40nmVDD:0.9VVBias2:0.44VVDDf0,3f0f0,3f0tt+1

52、804f0VBiasVBiasM3M419.2:A 12.4%Efficiency,11dBm Psat,Odd-Harmonics-Recycling,62-to-92GHz CMOS Frequency QuadruplerUsing an Amplitude-Phase Coordinating Technique 2024 IEEE International Solid-State Circuits Conference25 of 36Transformer Model for Frequency MultiplierAdding cross-coupling capacitorIm

53、proving design efficiencyKmLP/2RP/2LS/2RS/2DMCMGNDOpenMirrorImageCmCm19.2:A 12.4%Efficiency,11dBm Psat,Odd-Harmonics-Recycling,62-to-92GHz CMOS Frequency QuadruplerUsing an Amplitude-Phase Coordinating Technique 2024 IEEE International Solid-State Circuits Conference26 of 36Outline Motivation and Pr

54、ior-Arts Proposed Odd-Harmonics-Recycling Frequency QuadruplerOdd-Harmonics-Recycling ConfigurationAmplitude-Phase Coordinating TechniqueCircuit Implementation and Consideration Measurement and Comparison Conclusion19.2:A 12.4%Efficiency,11dBm Psat,Odd-Harmonics-Recycling,62-to-92GHz CMOS Frequency

55、QuadruplerUsing an Amplitude-Phase Coordinating Technique 2024 IEEE International Solid-State Circuits Conference27 of 36Die MicrographInputOutput392m678m238m537mInput MatchingCoupling InductorOdd-Harmonics GeneratorAmplitude-Phase Coordinating Interstage MatchingOutput BufferBalanced Square-Law Mix

56、er for Recycling Odd Harmonics40nm CMOSSupply voltage:0.9VTotal area:0.266mm2Core area:0.128mm219.2:A 12.4%Efficiency,11dBm Psat,Odd-Harmonics-Recycling,62-to-92GHz CMOS Frequency QuadruplerUsing an Amplitude-Phase Coordinating Technique 2024 IEEE International Solid-State Circuits Conference28 of 3

57、6Measurement setupGSGGSGDC Power SupplyPower MeterExtensionModuleSignal GeneratorPower MeterInput Frequency:15.5-23 GHzOutput Frequency:62-92 GHzMeasurement Setup for 4th Harmonic Power19.2:A 12.4%Efficiency,11dBm Psat,Odd-Harmonics-Recycling,62-to-92GHz CMOS Frequency QuadruplerUsing an Amplitude-P

58、hase Coordinating Technique 2024 IEEE International Solid-State Circuits Conference29 of 36Measurement setupMeasurement Setup for Harmonics Rejection PerformanceGSGGSGDC Power SupplySignal GeneratorInput Frequency:15.5-23 GHzSpectrum AnalyzerE-BandMixerD-BandMixer 19.2:A 12.4%Efficiency,11dBm Psat,O

59、dd-Harmonics-Recycling,62-to-92GHz CMOS Frequency QuadruplerUsing an Amplitude-Phase Coordinating Technique 2024 IEEE International Solid-State Circuits Conference30 of 36Power and Efficiency Measurement4th harmonic power and efficiency under Pinof 11dBm3dB bandwidth:from 62 to 92GHz(39%)60657075808

60、590950510154th Harmonic Power(dBm)4th Harmonic Frequency(GHz)Power(Meas.)Power(Sim.)(Meas.)(Sim.)0816244th Harmonic Efficiency(%)BW3dBfrom 62 to 92GHz with Pinof 11 dBm19.2:A 12.4%Efficiency,11dBm Psat,Odd-Harmonics-Recycling,62-to-92GHz CMOS Frequency QuadruplerUsing an Amplitude-Phase Coordinating

61、 Technique 2024 IEEE International Solid-State Circuits Conference31 of 36Power and Efficiency MeasurementSweep input power from 0 to 14dBmPeak output power:11dBm;Peak efficiency:12.4%02468101214-15-10-5051015204th Harmonic Power(dBm)Input Power(dBm)63GHz 68GHz 73GHz 78GHz 83GHz 88GHz05101520254th H

62、armonic Efficiency(%)Meas.Peak Power:11 dBmMeas.Peak Efficiency:12.4%19.2:A 12.4%Efficiency,11dBm Psat,Odd-Harmonics-Recycling,62-to-92GHz CMOS Frequency QuadruplerUsing an Amplitude-Phase Coordinating Technique 2024 IEEE International Solid-State Circuits Conference32 of 36Spectrum MeasurementHarmo

63、nic rejection under Pinof 11dBm1st:44.5dBc;2nd:44.7dBc;3rd:26.3dBc;5th:28dBc6065707580859095020406080100Harmonics Rejection(dBc)4th Harmonic Frequency(GHz)1st(Meas.)2nd(Meas.)3rd(Meas.)5th(Meas.)Rejection 26.3dBc over BW3dBFrequency Range28 dBc26.3 dBc44.5 dBc44.7 dBc19.2:A 12.4%Efficiency,11dBm Psa

64、t,Odd-Harmonics-Recycling,62-to-92GHz CMOS Frequency QuadruplerUsing an Amplitude-Phase Coordinating Technique 2024 IEEE International Solid-State Circuits Conference33 of 36Comparison TableReferenceThis WorkJSSC 2018 2M.KucharskiISSCC 2012 3Y.WangTMTT 2021 4Y.YehRFIC 2023 5P.RiccoMWCL 2021 6K.LeeTe

65、chnology40nm CMOS0.13m SiGeBiCMOS0.13m SiGeBiCMOS0.12m SiGeBiCMOS28nm CMOS40nm CMOSTopologyOdd-Harm.RecyclingStackedGilbert-CellsPhase-Controlled PPPhase-Controlled QPCascaded PPPhase-Controlled PPVDD(V)0.94.41.641N/AWays242422Freq.(GHz)62 to 92129 to 171121 to 13775.6 to 82.870 to 8665.6 to 75.2Ban

66、dwidth39%28%12.4%9.1%20.8%13.6%Psat/Pin(dBm)11/132.2/2.5-2.4/-311.2/1.20/3-0.2/8.9Psat/Way(dBm)8-4.8-5.45.2-3-3.2HarmonicsRejection(dBc)1st44.52nd44.73rd26.35th281st23.52nd21.53rd28N/A2080GHz1st602nd401st47.62nd33.43rd30.4PDC(mA)101.5&/32.3*10035.2/6.4+280/231+2011.38/5.08*(%)#12.4/8.52*1.71.6/9+4.7

67、/5.8+58.3/6.2*total(%)#10.371.631.64.694.5465Area(mm2)0.2660.610.271.40.481+0.28#=Psat/PDC,total#=Psat/(PDC+Pin),*Power gain at Psat,*Calculated w/o output buffer,+Calculated w/o input buffer,+Estimated from the figures.&The total PDC,PDC(Odd-Harmonics Generator)=23.6mW,PDC(Mixer)=8.7mW,PDC(Buffer)=

68、69.2mW.19.2:A 12.4%Efficiency,11dBm Psat,Odd-Harmonics-Recycling,62-to-92GHz CMOS Frequency QuadruplerUsing an Amplitude-Phase Coordinating Technique 2024 IEEE International Solid-State Circuits Conference34 of 36Comparison with State-of-ArtsAchieving high efficiency and wide bandwidth51015202530354

69、045051015 ISSCC 12 IMS 20 TMTT 16 RFIC 20 JSSC 18 TMTT 21 TMTT 20 MWCL 21 RFIC 23 TCAS21RFIC15TCAS23SSCL 21MWCL 20 This Work,CMOS SiGe CMOS4th Harmonic Efficiency(%)3dB Power Bandwidth(%)19.2:A 12.4%Efficiency,11dBm Psat,Odd-Harmonics-Recycling,62-to-92GHz CMOS Frequency QuadruplerUsing an Amplitude

70、-Phase Coordinating Technique 2024 IEEE International Solid-State Circuits Conference35 of 36ConclusionAn Odd-harmonics-recycling frequency quadrupler is proposed.Odd-harmonics-recycling configuration for high efficiencyAmplitude-phase coordinating technique for high harmonics rejectionCommon-mode c

71、oupling inductor for compact chip areaTransformer model suitable for frequency multiplier for high design efficiencyPrototyped in 40nm CMOSHigh DC-to-RF efficiency:12.4%Wide power bandwidth:62 to 92GHz(39%)High output power:11dBm19.2:A 12.4%Efficiency,11dBm Psat,Odd-Harmonics-Recycling,62-to-92GHz C

72、MOS Frequency QuadruplerUsing an Amplitude-Phase Coordinating Technique 2024 IEEE International Solid-State Circuits Conference36 of 36AcknowledgmentThe authors thank the support of National Key R&D Program of China under Grant 2019YFB2204701,and the National Natural Science Foundation of China unde

73、r Grants 61831006,62022023.19.2:A 12.4%Efficiency,11dBm Psat,Odd-Harmonics-Recycling,62-to-92GHz CMOS Frequency QuadruplerUsing an Amplitude-Phase Coordinating Technique 2024 IEEE International Solid-State Circuits Conference37 of 36Please Scan to Rate Please Scan to Rate This PaperThis PaperAn 8.9-

74、to-21.9GHz Single-Core Oscillator with Reconfigurable Class-F1 and Enhanced-Colpitts Dual-Mode Operation Achieving 209dBc/Hz FoMT 2024 IEEE International Solid-State Circuits Conference1 of 26An 8.9-to-21.9GHz Single-Core Oscillator with Reconfigurable Class-F1 and Enhanced-Colpitts Dual-Mode Operat

75、ion Achieving 209dBc/Hz FoMTZehui Kang,Chen Yu,Liang WuThe Chinese University of Hong Kong,Shenzhen,Shenzhen,ChinaAn 8.9-to-21.9GHz Single-Core Oscillator with Reconfigurable Class-F1 and Enhanced-Colpitts Dual-Mode Operation Achieving 209dBc/Hz FoMT 2024 IEEE International Solid-State Circuits Conf

76、erence2 of 26Outline Motivation and review of prior arts Proposed oscillator architectureClass-F-1operation in DMColpitts operation in CM Measurement results ConclusionAn 8.9-to-21.9GHz Single-Core Oscillator with Reconfigurable Class-F1 and Enhanced-Colpitts Dual-Mode Operation Achieving 209dBc/Hz

77、FoMT 2024 IEEE International Solid-State Circuits Conference3 of 26Motivation Ultra wideband LO with low phase noise is desired formulti-standard communication devices,radios,andwireline data links.High data rateLong battery lifeCover multiple bandsLow cost Tradeoff between the phase noise and tunin

78、g range.=176.8+20log +10log 10log()=+20log(/10%)Low phase noiseLow power consumptionWide frequency rangeSmall chip areaAn 8.9-to-21.9GHz Single-Core Oscillator with Reconfigurable Class-F1 and Enhanced-Colpitts Dual-Mode Operation Achieving 209dBc/Hz FoMT 2024 IEEE International Solid-State Circuits

79、 Conference4 of 26Prior-art wide tuning range VCOs Switched tank oscillator-Gm-Gm-GmSwitched capacitorSwitched inductorSwitched transformerParasitic capacitance Loss of the switchesAn 8.9-to-21.9GHz Single-Core Oscillator with Reconfigurable Class-F1 and Enhanced-Colpitts Dual-Mode Operation Achievi

80、ng 209dBc/Hz FoMT 2024 IEEE International Solid-State Circuits Conference5 of 26 Mode-switching multi-core oscillatorCore mismatchNo switch lossPN scaled with PDCHigh noise factorPrior-art wide tuning range VCOsShu et al,ISSCC 20-Gmkk-GmCmCmCCLL-GmCmCmCCLL-GmQuad-mode:18.640.1GHz(73.3%)FoM 10MHz:183

81、.0186.3dBc/HzQuad-mode using two resonator tanksM-coupling:transformerE-coupling:capacitorMode-switching:2-D mode switch array An 8.9-to-21.9GHz Single-Core Oscillator with Reconfigurable Class-F1 and Enhanced-Colpitts Dual-Mode Operation Achieving 209dBc/Hz FoMT 2024 IEEE International Solid-State

82、Circuits Conference6 of 26 Mode-switching multi-core oscillatorPrior-art wide tuning range VCOsDual-core triple-modeConstructive/destructive magnetic couplingCoil current cancellationInductor shortcuttingCompact high-Q transformerJiang et al,ISSCC 22CmCmCB-GmCBk1k1L1L2L1L2L3L3k2SHSHSLSL-Gm-Gm-GmTrip

83、le-mode:7.116.8GHz(80.6%)FoM 10MHz:185.1187.6dBc/HzNo switch lossSmall chip areaHigh noise factorAn 8.9-to-21.9GHz Single-Core Oscillator with Reconfigurable Class-F1 and Enhanced-Colpitts Dual-Mode Operation Achieving 209dBc/Hz FoMT 2024 IEEE International Solid-State Circuits Conference7 of 26 Mod

84、e-switching multi-core oscillatorEl-Assar et al,JSCC 21Prior-art wide tuning range VCOsHigh swingDual-core triple-modeFolded core designForward body biasPositive feedback bufferTriple-mode:817GHz(72%)FoM 10MHz:180.7191.7dBc/HzLGLD+LGLD+No switch lossLow phase noiseHigh FoM variationAn 8.9-to-21.9GHz

85、 Single-Core Oscillator with Reconfigurable Class-F1 and Enhanced-Colpitts Dual-Mode Operation Achieving 209dBc/Hz FoMT 2024 IEEE International Solid-State Circuits Conference8 of 26Prior-art wide tuning range VCOs Prior-art VCOsAv=1High noise factorQ degradationGmVGVDQ degradationQeffCM(destructive

86、)DM(constructive)Proposed VCOAv 1ISF reshaping/small GDSCompensated QClass-F 1Enhanced-ColpittsZL2L1C1C2L2L1C1SWC2VCTRLkVCTRLVCTRLLHZ2nd(tank)Z1st(tank)0200.0000000.0000020.0000040.000006051015Idrain(mA)freqC2C2An 8.9-to-21.9GHz Single-Core Oscillator with Reconfigurable Class-F1 and Enhanced-Colpit

87、ts Dual-Mode Operation Achieving 209dBc/Hz FoMT 2024 IEEE International Solid-State Circuits Conference9 of 26Class-F1operation in differential mode Second harmonic voltage ISF reshaping 2-port tank Av12-portTankGmVDVGClass-F 1ZZ2nd(tank)Z1st(tank)0200.0000000.0000020.0000040.000006051015Idrain(mA)f

88、reqL2L1C1C2L2L1C1SWC2VCTRLkVCTRLVCTRLLH+C2C2An 8.9-to-21.9GHz Single-Core Oscillator with Reconfigurable Class-F1 and Enhanced-Colpitts Dual-Mode Operation Achieving 209dBc/Hz FoMT 2024 IEEE International Solid-State Circuits Conference10 of 26Class-F1operation in differential mode,=02+1+122 2 1+1=(

89、1+)2/1,=(2+2)/1,0=1/(1+)2(2+2)=+1+122 2 1+1+1+122 2 1+1 Constant/ratio Constant(2+2)/1VINGmVINZIN-1VGVD1/GdsR2(1+k)L2C2+C2R1L1C1L2L1C1C2L2L1C1SWC2VCTRLkVCTRLVCTRLLH+C2C2An 8.9-to-21.9GHz Single-Core Oscillator with Reconfigurable Class-F1 and Enhanced-Colpitts Dual-Mode Operation Achieving 209dBc/Hz

90、 FoMT 2024 IEEE International Solid-State Circuits Conference11 of 26Class-F1operation in differential modeSame control voltage of 1,2for coarse tuning2for fine tuningVINGmVINZIN-1VGVD1/GdsR2(1+k)L2C2+C2R1L1C105101520Idrain(mA)freqFrequency GHz010203005101520Impedance VCTRL=0VVCTRL=1.2VC1 fF50080011

91、0014001.82.02.22.42.6H/L1.62.8500800110014001.61.82.02.22.42.62.8 w/o same bias w/same biasIdrain(mA)capL2L1C1C2L2L1C1SWC2VCTRLkVCTRLVCTRLLH+C2C2An 8.9-to-21.9GHz Single-Core Oscillator with Reconfigurable Class-F1 and Enhanced-Colpitts Dual-Mode Operation Achieving 209dBc/Hz FoMT 2024 IEEE Internat

92、ional Solid-State Circuits Conference12 of 26Class-F1operation in differential mode0.0106.5213.0319.51.60.80.00.81.6Idrain(mA)F Vds Vgs0.00E+00 3.48E-11 6.95E-11 1.04E-10 1.39E-10-1.6-0.80.00.81.6 Vds VgsIdrain(mA)timeVoltage V1.60.800.81.6VCTRL=1.2VVoltage V1.60.800.81.6Vgs,pp=1.96VAV=3.63VCTRL=0VF

93、lat sectionFlat sectionVgs,pp=2.58VAV=3.1804 2 3 Phase04 2 3 PhaseVds,pp=0.54VVds,pp=0.81V01062123184241.00.50.00.51.0Idrain(mA)G1.20.00.10.20.30.40.5Idrain(mA)vconVCTRL=0VVCTRL=1.2VISF00.51 VCTRL V00.20.40.61.20.10.20.30.40.5|V2nd/V1st|0.81.0004 2 3 PhaseNoise insensitiveISF 0 0.350.43 Constant har

94、monic ratio Slight ISF variationAn 8.9-to-21.9GHz Single-Core Oscillator with Reconfigurable Class-F1 and Enhanced-Colpitts Dual-Mode Operation Achieving 209dBc/Hz FoMT 2024 IEEE International Solid-State Circuits Conference13 of 26Colpitts operation in common mode Mode switchingNo loss,=02+1+122 2

95、1+1=(+0.5(1 )2)/1,=(2+2)/10=1/2(1 )2/2+)(2+2)VINGmVINZIN-1VGVD1/GdsR2LH+0.5 k)L22(C2+C2)R1L12C1L2L1C1C2L2L1C1SWC2VCTRLkVCTRLVCTRLLH+C2C2An 8.9-to-21.9GHz Single-Core Oscillator with Reconfigurable Class-F1 and Enhanced-Colpitts Dual-Mode Operation Achieving 209dBc/Hz FoMT 2024 IEEE International Sol

96、id-State Circuits Conference14 of 26Colpitts operation in common mode05101520Idrain(mA)freq05101520Idrain(mA)freq05101520Impedance Frequency GHz010203005101520Impedance 40Differential-ModeCommon-Mode=(1 )2/2+)/1=(2+2)/10=1/2(1 )2/2+)(2+2)=(1+)2/1=(2+2)/10=1/(1+)2(2+2)LHfor(1)Design freedom(2)Frequen

97、cy tuningL2L1C1C2L2L1C1SWC2VCTRLkVCTRLVCTRLLH+C2C2An 8.9-to-21.9GHz Single-Core Oscillator with Reconfigurable Class-F1 and Enhanced-Colpitts Dual-Mode Operation Achieving 209dBc/Hz FoMT 2024 IEEE International Solid-State Circuits Conference15 of 26Colpitts operation in common modeLHfor(3)Oscillati

98、on condition(4)Q compensation1=1/(1+)2(2+2)2=1/(1 )2(2+2)2=1/2(1 )2/2)+)(2+2)0freqDM1CM22capacitive at 0L2L1C1C2L2L1C1SWC2VCTRLkVCTRLVCTRLLH+C2C2 k)L22,inductive at 0 LH k)L22,capacitive at 0 (1+k)L21,inductive at 0 +C2C2+C2C2+C2C2An 8.9-to-21.9GHz Single-Core Oscillator with Reconfigurable Class-F1

99、 and Enhanced-Colpitts Dual-Mode Operation Achieving 209dBc/Hz FoMT 2024 IEEE International Solid-State Circuits Conference16 of 26Colpitts operation in common mode Narrow resistive region Small GDSGM S00.050.1504 2 3 Phase0.1GDS S00.10.30.40.504 2 3 Phase0.203264961280.00.10.20.30.40.5 GDS,DM GDS,C

100、MIdrain(mA)L03264961280.000.050.100.15 GM,DM GM,CMIdrain(mA)L0110220330-0.8-0.40.00.40.81.2 Vds Vgs Vgs-VthIdrain(mA)F(CM)Voltage V 00.81.604 2 3 Phase0110220330-2.4-1.6-0.80.00.81.6 Vds Vgs Vgs-VthIdrain(mA)time 53%Voltage V0.80.50.40.81.204 2 3 Phase018%Differential-ModeCommon-ModeAn 8.9-to-21.9GH

101、z Single-Core Oscillator with Reconfigurable Class-F1 and Enhanced-Colpitts Dual-Mode Operation Achieving 209dBc/Hz FoMT 2024 IEEE International Solid-State Circuits Conference17 of 26Colpitts operation in common mode Enhanced swing Reduced PDC Boosted impedance L2L1C1C2L2L1C1SWC2VCTRLkVCTRLVCTRLLH+

102、C2C2L1/22C1VbiasLEQw/enhanced swingw/o enhanced swingZINZIN2C1L1/22(C2+C2)2(C2+C2)An 8.9-to-21.9GHz Single-Core Oscillator with Reconfigurable Class-F1 and Enhanced-Colpitts Dual-Mode Operation Achieving 209dBc/Hz FoMT 2024 IEEE International Solid-State Circuits Conference18 of 26Colpitts operation

103、 in common mode0.0106.5213.0319.5426.0-0.40.00.40.81.2 Vds VgsIdrain(mA)time0.0106.5213.0319.5-0.40.00.40.81.2 Vds VgsIdrain(mA)timeVoltage V 00.40.81.2Voltage V 00.40.81.204 2 3 Phase04 2 3 PhaseVpp,ds=0.34VVpp,ds=0.86VVpp,gs=1.22Vw/o enhanced swing(VDD=1.2V)Vpp,gs=0.61Vw/enhanced swing(VDD=0.45V)4

104、8121620242801020304050Idrain(mA)freq w/enhanced swing w/o enhanced swing481216202428-505101520Idrain(mA)freq w/enhanced swing w/o enhanced swingQ51015051020304050Impedance 042012816Frequency GHz2428Q=18.5Q=12.42042012816Frequency GHz242830.242.2 Higher voltage swing Higher impedance Higher QAn 8.9-t

105、o-21.9GHz Single-Core Oscillator with Reconfigurable Class-F1 and Enhanced-Colpitts Dual-Mode Operation Achieving 209dBc/Hz FoMT 2024 IEEE International Solid-State Circuits Conference19 of 26Chip PhotoCore0.36mm0.29mmL1L1L2LHL2 40nm CMOS Core area:0.36mm 0.29mm(0.1mm2)Supply voltage:0.45 V Power:5.

106、6 to 14.8 mWAn 8.9-to-21.9GHz Single-Core Oscillator with Reconfigurable Class-F1 and Enhanced-Colpitts Dual-Mode Operation Achieving 209dBc/Hz FoMT 2024 IEEE International Solid-State Circuits Conference20 of 26Measured Phase NoisePN 1MHz:117.31dBc/HzPN 10MHz:138.58dBc/HzFoM 1MHz:187.13dBc/HzFoM 10

107、MHz:188.4dBc/Hz1MHz10MHz100kHz10kHzDifferential Mode Count 10/10 Freq:8.938GHzAn 8.9-to-21.9GHz Single-Core Oscillator with Reconfigurable Class-F1 and Enhanced-Colpitts Dual-Mode Operation Achieving 209dBc/Hz FoMT 2024 IEEE International Solid-State Circuits Conference21 of 26Measured Phase Noise1M

108、Hz10MHz100kHz10kHzPN 1MHz:110.48dBc/HzPN 10MHz:132.63dBc/HzFoM 1MHz:188.3dBc/HzFoM 10MHz:190.5dBc/HzCommon Mode Count 10/10 Freq:21.922GHzAn 8.9-to-21.9GHz Single-Core Oscillator with Reconfigurable Class-F1 and Enhanced-Colpitts Dual-Mode Operation Achieving 209dBc/Hz FoMT 2024 IEEE International S

109、olid-State Circuits Conference22 of 26Measurement ResultsFoM 10MHz:184.8 to 190.5dBc/HzPN 10MHz:138.6 to 131.1dBc/Hz810121416182022-140-135-130-125-120-115-110Phase noise 10MHzFreq(GHz)165170175180185190195FoM 10MHzFreq GHz8101214161820PN 10MHz dBc/Hz 25 30 20 15 22FoM10MHz dBc/Hz180175170185190195

110、40165Differential-Mode8.9414.44GHzCommon-Mode14.1621.92GHzAn 8.9-to-21.9GHz Single-Core Oscillator with Reconfigurable Class-F1 and Enhanced-Colpitts Dual-Mode Operation Achieving 209dBc/Hz FoMT 2024 IEEE International Solid-State Circuits Conference23 of 26Performance Comparison81216202428321781801

111、82184186188FOMT(dBc/Hz)center frequency(GHz)8121620242832194196198200202204206208FOMT(dBc/Hz)center frequency(GHz)Freq GHz81216202428FoMT 10MHz dBc/Hz19819619420020220432Assar,JSSC21Agrawal,TMTT17Gong,ISSCC22Raj,VLSI16*Sun,TMTT23Deng,CICC21Li,JSSC23Shu,ISSCC20Bhat,ISSCC19Shu,RFIC18Murphy,JSSC18*This

112、 workFreq GHz81216202428FoM 10MHz dBc/Hz18218017818418618832Assar,JSSC21Gong,ISSCC22Raj,VLSI16*Sun,TMTT23Deng,CICC21Li,JSSC23Shu,ISSCC20Bhat,ISSCC19Shu,RFIC18Murphy,JSSC18*This work206208Agrawal,TMTT17*Estimated from 1MHz performanceAn 8.9-to-21.9GHz Single-Core Oscillator with Reconfigurable Class-

113、F1 and Enhanced-Colpitts Dual-Mode Operation Achieving 209dBc/Hz FoMT 2024 IEEE International Solid-State Circuits Conference24 of 26Performance SummaryFoM=|PN|+20log10(f0/f)-10log10(PDC/1mW)FoMT=FoM+20log10(TR/10%)An 8.9-to-21.9GHz Single-Core Oscillator with Reconfigurable Class-F1 and Enhanced-Co

114、lpitts Dual-Mode Operation Achieving 209dBc/Hz FoMT 2024 IEEE International Solid-State Circuits Conference25 of 26Conclusion Reconfigured VCO topology between differential-modeand common-modeClass-F-1topology with ISF reshapingColpitts topology with enhanced swing Oscillator prototype in 40nm CMOSW

115、ide frequency rangeState-of-the-art FoM and FoMTAn 8.9-to-21.9GHz Single-Core Oscillator with Reconfigurable Class-F1 and Enhanced-Colpitts Dual-Mode Operation Achieving 209dBc/Hz FoMT 2024 IEEE International Solid-State Circuits Conference26 of 26Acknowledgment The authors thank the support ofThe N

116、ational Natural Science Foundation of China underGrant No.62271435The National Key R&D Program of China under Grant2018YFB1802002Shenzhen Science and Technology Program under GrantKQTD20200909114730003 and SGDX20201103095401009An 8.9-to-21.9GHz Single-Core Oscillator with Reconfigurable Class-F1 and

117、 Enhanced-Colpitts Dual-Mode Operation Achieving 209dBc/Hz FoMT 2024 IEEE International Solid-State Circuits Conference27 of 26Please Scan to Rate Please Scan to Rate This PaperThis Paper19.4:A 0.07mm220-to-23.8GHz 8-phase Oscillator Incorporating Magnetic+Dual-Injection Coupling Achieving 189.2dBc/

118、Hz FoM10MHz and 200.7 dBc/Hz FoMAin 65nm CMOS 2024 IEEE International Solid-State Circuits Conference1 of 31A 0.07mm220-to-23.8GHz 8-phase Oscillator Incorporating Magnetic+Dual-Injection Coupling Achieving 189.2dBc/Hz FoM10MHz and 200.7dBc/Hz FoMAin 65nm CMOS Ya Zhao 1,Chao Fan1,Qiuyu Fang1,Guohe Z

119、hang1,Jun Yin 2,Pui-In Mak2,and Li Geng11 School of Microelectronics,Xian Jiaotong University,Xian,China2 State-Key Laboratory of Analog and Mixed-Signal VLSI,University of Macau,China 2024 IEEE International Solid-State Circuits Conference2 of 3119.4:A 0.07mm220-to-23.8GHz 8-phase Oscillator Incorp

120、orating Magnetic+Dual-Injection Coupling Achieving 189.2dBc/Hz FoM10MHz and 200.7 dBc/Hz FoMAin 65nm CMOS Self IntroductionYa Zhao B.S.degree from Chong Qing University,in 2020.Currently pursuing Ph.D.degree at Xian Jiaotong University(XJTU).My research interests include RF and mm-wave oscillator an

121、d frequency synthesizer.2024 IEEE International Solid-State Circuits Conference3 of 3119.4:A 0.07mm220-to-23.8GHz 8-phase Oscillator Incorporating Magnetic+Dual-Injection Coupling Achieving 189.2dBc/Hz FoM10MHz and 200.7 dBc/Hz FoMAin 65nm CMOS Outline Motivation Review of Prior-Art 8-phase Oscillat

122、or Proposed Magnetic+Dual-Injection Coupling 8-phase Oscillator Measurement Results Conclusions 2024 IEEE International Solid-State Circuits Conference4 of 3119.4:A 0.07mm220-to-23.8GHz 8-phase Oscillator Incorporating Magnetic+Dual-Injection Coupling Achieving 189.2dBc/Hz FoM10MHz and 200.7 dBc/Hz

123、FoMAin 65nm CMOS MotivationBaseband I Baseband Q BB Out BB Out LNA RF in Sub-harmonic mixer Sub-harmonic mixer S.E to Diff.Transconductor 8-phase VCO 0 90 45 135 NMm-wave 8-phase oscillator for wireless transceiver and RadiatorTransceiverMulti-phase operation lowers the carrier frequency Radiator Lo

124、w phase noiseLow phase errorLow power consumptionCompact silicon areaMulti-phase oscillation enables the circularly polarized radiator Metric requirement Mazzanti,ISSCC08Nazari,JSSC17 2024 IEEE International Solid-State Circuits Conference5 of 3119.4:A 0.07mm220-to-23.8GHz 8-phase Oscillator Incorpo

125、rating Magnetic+Dual-Injection Coupling Achieving 189.2dBc/Hz FoM10MHz and 200.7 dBc/Hz FoMAin 65nm CMOS Mm-wave Multi-Phase Oscillator0-0.20.150.50.851.2Voltage(V)1234p p 2p p Core-1 Coupling networkCore-2 Core-3 Core-N (f1)(f2)(f3)(fN)Millimeter-wave multi-phase LO generated by multi-core LC-ring

126、oscillatorFrequency mismatch(f1 f2 fN)incurs unbalanced phase interval (1 4 2 3)2024 IEEE International Solid-State Circuits Conference6 of 3119.4:A 0.07mm220-to-23.8GHz 8-phase Oscillator Incorporating Magnetic+Dual-Injection Coupling Achieving 189.2dBc/Hz FoM10MHz and 200.7 dBc/Hz FoMAin 65nm CMOS

127、 Prior-Arts 8-phase Oscillator(1)Capacitor-coupling network aggravates resonator loading Frequency tuning range degradationWeak coupling strength Unbalanced phase interval due to frequency mismatchStandalone inductors Substantial chip area occupation-gm -gm capacitor coupling network-gm -gm VDDVDDVD

128、DVDDElectrical-coupling 8-phase oscillatorLi,JSSC10LC-GMCCCCLC-GMCCCCLC-GMCCCCLC-GMCCCCCoupling network 2024 IEEE International Solid-State Circuits Conference7 of 3119.4:A 0.07mm220-to-23.8GHz 8-phase Oscillator Incorporating Magnetic+Dual-Injection Coupling Achieving 189.2dBc/Hz FoM10MHz and 200.7

129、 dBc/Hz FoMAin 65nm CMOS Prior-Arts 8-phase Oscillator(2)-gm -gm Active coupling network-gm -gm VDDVDDVDDVDDLCGMGMGMGMCoupling networkActive-coupling 8-phase oscillatorActive-coupling network introduces additional transistors Phase noise penaltyWeak coupling strength Unbalanced phase interval due to

130、 frequency mismatchStandalone inductors Substantial chip area occupationRong,JSSC11 2024 IEEE International Solid-State Circuits Conference8 of 3119.4:A 0.07mm220-to-23.8GHz 8-phase Oscillator Incorporating Magnetic+Dual-Injection Coupling Achieving 189.2dBc/Hz FoM10MHz and 200.7 dBc/Hz FoMAin 65nm

131、CMOS Proposed mm-wave 8-phase OscillatorVN1VN2VN3VN4VP1VP2VP3VP4CORE#X(X=1,2,3,4)VNXVPXInjection device-GM1 VN1kkVP1VN2VP2kVN3kVP3VN4VP4kkkkZ115 2 6 3 7 4 8 CORE#3CORE#2CORE#1CORE#4(N=1,2,3,4,5,6,7)Phase shift:=N+1-NMagnetic-coupling 8-phase oscillatorTransformer magnetic coupling No phase noise pen

132、alty from coupling networkDual-phase injection coupling Improved phase noise and reduced phase errorWindmill-shaping transformer Superior chip area efficiency 2024 IEEE International Solid-State Circuits Conference9 of 3119.4:A 0.07mm220-to-23.8GHz 8-phase Oscillator Incorporating Magnetic+Dual-Inje

133、ction Coupling Achieving 189.2dBc/Hz FoM10MHz and 200.7 dBc/Hz FoMAin 65nm CMOS Windmill-Shaping TransformerWindmill-shaping transformerEquivalent resonator of single coreL22L12L1kRLVN2Leff(I2+I3)/2I1L2RLVN1,3Z112L2-2kL1RL(I2+I3)/2I12(1+k)L1LeffVN2VN1,32(1+k)L1Z112Windmill-shaping transformer enable

134、s the identical resonator for each oscillation core.Nodes VN1and VN3are merged together(VN1,3)by exploiting the symmetric position on VN2.I2I1I3()()1efN21L121123Lf1V=jI+R I =j 2L+LI-jkI+I+RLLI 2024 IEEE International Solid-State Circuits Conference10 of 3119.4:A 0.07mm220-to-23.8GHz 8-phase Oscillat

135、or Incorporating Magnetic+Dual-Injection Coupling Achieving 189.2dBc/Hz FoM10MHz and 200.7 dBc/Hz FoMAin 65nm CMOS Oscillation State Analysis Tank current with=45 Tank current with=135 Phase diagram of tank currentI1,1I2,3I3,245 I2+I3=2I1I1,1I2,3I3,2135 I2+I3=2I1=45:()1eff12=2-2k L+LL=135:()1eff22=2

136、+2k L+LL()()223eff2eff212_2f135e423_eff1f 1125Q L+L2L+LZ11=Z11Q L+L2L+LBoth the 45 and 135 phase shift()could satisfy Barkhausens phase criterionThe simulated magnitude Z11_135=1.22k and Z11_45=0.26k,when k=0.9Large k(=0.9)high Z11_135/Z11_45(=4.7)ratio,determinate oscillation state and reduced powe

137、r Frequency(GHz)Z11 Mag(k)=135 =45 k=0.9 k=0.6 k=0.3 1520253035404500.20.40.60.81.01.21.40.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.91234561.0=1.62 =2.67 =4.7 k 2024 IEEE International Solid-State Circuits Conference11 of 3119.4:A 0.07mm220-to-23.8GHz 8-phase Oscillator Incorporating Magnetic+Dual-Injection

138、Coupling Achieving 189.2dBc/Hz FoM10MHz and 200.7 dBc/Hz FoMAin 65nm CMOS-GMCells of the 8-phase Oscillator Inherent multi-phase outputs are utilized for dual-injection coupling with the cascode tail-injection transistors.Dual-injection coupling strengthens the quad-core coupling and enables noise c

139、irculating forPN reduction.VN1VP1VN2VP3VP2VN3VN4VP4VP1VN2VN1VP2VN2VP2VN3VP4VP3VN4VN3VP3VN4VN1VP4VP1C1C1C1C1C2C2C2C2(V0)(V180)(V135)(V315)(V270)(V90)(V45)(V225)2024 IEEE International Solid-State Circuits Conference12 of 3119.4:A 0.07mm220-to-23.8GHz 8-phase Oscillator Incorporating Magnetic+Dual-Inj

140、ection Coupling Achieving 189.2dBc/Hz FoM10MHz and 200.7 dBc/Hz FoMAin 65nm CMOS-GMCell Noise Circulating Taking CORE#1 as an exampleM1M2VN1VP1VN2M3VP3M5In,M3In,M5In,M1VP2M4VN3M6ZUPZDNZDN12In,M3(2+2)In,M12(In,M3+In,M5)/422(2+2)In,M1/422222In,M522219202122232425-134-132-130-128-126PN 10MHz(dBc/Hz)Fre

141、quency(GHz)w/o tail inj.w/tail inj.3.7dB 3.8dB VN1VP1VN2VP3VP2VN3C1C1Only part of the noise current flows through the resonator,and the rest circulate to the groundwithout the PN penalty.The simulated PN10MHzof the GMcell entailing a tail-injection transistor is reduced 3.7 dBwhen comparing with the

142、 GMcell including only the cross-coupled pair.2024 IEEE International Solid-State Circuits Conference13 of 3119.4:A 0.07mm220-to-23.8GHz 8-phase Oscillator Incorporating Magnetic+Dual-Injection Coupling Achieving 189.2dBc/Hz FoM10MHz and 200.7 dBc/Hz FoMAin 65nm CMOS Noise Analysis-Without Tail Inje

143、ctionTank voltage:-15-10-5051002p p p p hi(A-1)Non-normalized ISF:()()ii0max h 2f q=()()2mn,GMi=4KTgi,tanki,M12QV2h2hC=()()2dsn,GDSi=4KTg()P2n,tank4KTRi=GM&GDS(mS)02p p 01020304050p p gds gm M1M2VN1VP1CCQVLeff2Leff2VDD L1=60 pH L2=40 pH QL1=10 QL2=10 k=0.87 M1-2=12/0.06 m C=188 fF 2024 IEEE Internat

144、ional Solid-State Circuits Conference14 of 3119.4:A 0.07mm220-to-23.8GHz 8-phase Oscillator Incorporating Magnetic+Dual-Injection Coupling Achieving 189.2dBc/Hz FoM10MHz and 200.7 dBc/Hz FoMAin 65nm CMOS Noise Analysis With Tail Injection02p p p p hi(A-1)0-10-50510hi,M3 hi,tank 02040608001.53.04.56.

145、0GDS(mS)02p p p p gm3 GM(mS)gds3 m1ds1m1ds111i,M3i,tankm1ds1m3ds3m5ds5m1ds1m3ds3m5ds5g+gg+gQVVhhCg+g+g+g+g+g2g+g+g+g+g+g=M3noise calculation L1=60 pH L2=40 pH QL1=10 QL2=10 k=0.87 M1-6=12/0.06 m C=166 fF M1M2VN1VP1VP3M3CCQV1gds3VN2M5gds5VN3M4VP2M6Q1Q2Q3Q1Leff2Leff2VDD 2024 IEEE International Solid-S

146、tate Circuits Conference15 of 3119.4:A 0.07mm220-to-23.8GHz 8-phase Oscillator Incorporating Magnetic+Dual-Injection Coupling Achieving 189.2dBc/Hz FoM10MHz and 200.7 dBc/Hz FoMAin 65nm CMOS Noise Analysis With Tail Injection2p p p p hi(A-1)hi,M5 hi,tank -10-505100GDS(mS)02p p p p GM(mS)02040608001.

147、753.55.257gm5 gds5 m1ds1m1ds142i,M5i,tankm1ds1m3ds3m5ds5m1ds1m3ds3m5ds5g+gg+gQVVhhCg+g+g+g+g+g2g+g+g+g+g+g=M5noise calculationM1M2VN1VP1VP3M3CCQV2gds3VN2M5gds5VN3M4VP2M6Q4Q5Q6Q4Leff2Leff2VDDVP1 2024 IEEE International Solid-State Circuits Conference16 of 3119.4:A 0.07mm220-to-23.8GHz 8-phase Oscilla

148、tor Incorporating Magnetic+Dual-Injection Coupling Achieving 189.2dBc/Hz FoM10MHz and 200.7 dBc/Hz FoMAin 65nm CMOS Noise Analysis With Tail Injection-10-50510hi,M1 hi,tank 2p p p p hi(A-1)0GDS(mS)GM(mS)gm1 gds1 0204060800510152002p p p p m3ds3m3ds373i,M1i,tankm1ds1m3ds3m5ds5m1ds1m3ds3m5ds5g+gg+gQVV

149、hhCg+g+g+g+g+g2g+g+g+g+g+g=M1noise calculation induced by M3M1M2VN1VP1VP3M3CCQV3gds1VN2M5gds5VN3M4VP2M6Q7gds3Q7Q9Q9Leff2Leff2VDD 2024 IEEE International Solid-State Circuits Conference17 of 3119.4:A 0.07mm220-to-23.8GHz 8-phase Oscillator Incorporating Magnetic+Dual-Injection Coupling Achieving 189.

150、2dBc/Hz FoM10MHz and 200.7 dBc/Hz FoMAin 65nm CMOS Noise Analysis With Tail Injectionhi,M1_1 hi,tank 2p p p p hi(A-1)0-10-505108m5ds5m5ds54i,M1_1i,tankm1ds1m3ds3m5ds5m1ds1m3ds3m5ds5Qg+gg+gVVhhCg+g+g+g+g+g2g+g+g+g+g+g=M1noise calculation induced by M5GDS(mS)GM(mS)gm1 gds1 0204060800510152002p p p p M

151、1M2VN1VP1VP3M3CCQV4gds1VN2M5gds5VN3M4VP2M6Q8gds3Q8Q9Q9Leff2Leff2VDD 2024 IEEE International Solid-State Circuits Conference18 of 3119.4:A 0.07mm220-to-23.8GHz 8-phase Oscillator Incorporating Magnetic+Dual-Injection Coupling Achieving 189.2dBc/Hz FoM10MHz and 200.7 dBc/Hz FoMAin 65nm CMOS Calculated

152、 and Simulated Noise Breakdown Noise sourcesWith tail injectionWithout tail injectionvaluesharevalueshareNtank0.4 12%0.54 7.8%NGDS2.54 76%4.26 61.7%NGM0.4 12%2.11 30.5%NTotal3.34 100%6.91 100%PN1MHz(Cal.)108.4 dBc/Hz105.2 dBc/HzPN1MHz(Sim.)109.2 dBc/Hz106 dBc/HzCalculated PN consistent with simulate

153、d PN(difference C2).2024 IEEE International Solid-State Circuits Conference20 of 3119.4:A 0.07mm220-to-23.8GHz 8-phase Oscillator Incorporating Magnetic+Dual-Injection Coupling Achieving 189.2dBc/Hz FoM10MHz and 200.7 dBc/Hz FoMAin 65nm CMOS Windmill-Shaping Transformer The windmill-shaping transfor

154、mer is anoctagon geometry to secure the identicalinductance for each oscillation core.The AP layer stacks atop the M9 layer tomaximize the coupling factor k.The testing buffer is placed in the middleof coils.VN1VN2VN3VN4VP1VP2VP3VP4Buf.Buf.Buf.Buf.Buf.Buf.Buf.Buf.V0V135V270V45V180V315V90V225M9APM8 2

155、024 IEEE International Solid-State Circuits Conference21 of 3119.4:A 0.07mm220-to-23.8GHz 8-phase Oscillator Incorporating Magnetic+Dual-Injection Coupling Achieving 189.2dBc/Hz FoM10MHz and 200.7 dBc/Hz FoMAin 65nm CMOS Power Delivery Network(VDD)VDDis placed in the middle to guaranteethe same coup

156、ling with the adjacent coils.UnbalancedVDDnetworkbenefitsreducing the phase error introduced bytheasymmetricalswitched-capacitorarrays(SCAs)layout.Using AP layer to reduce the IR drop.VN1VN2VN3VN4VP1VP2VP3VP4M9APVDDVDDVDDVDDVDDVDDVDD 2024 IEEE International Solid-State Circuits Conference22 of 3119.

157、4:A 0.07mm220-to-23.8GHz 8-phase Oscillator Incorporating Magnetic+Dual-Injection Coupling Achieving 189.2dBc/Hz FoM10MHz and 200.7 dBc/Hz FoMAin 65nm CMOS Power Delivery Network(VSS)VN1VN2VN3VN4VP1VP2VP3VP4VSSVSSVSSVSSVSSVSSVSSVSSM9APM8 VSSis placed in the middle to guaranteethe same coupling with

158、the adjacent coils.Using M9 layer to reduce the IR drop.2024 IEEE International Solid-State Circuits Conference23 of 3119.4:A 0.07mm220-to-23.8GHz 8-phase Oscillator Incorporating Magnetic+Dual-Injection Coupling Achieving 189.2dBc/Hz FoM10MHz and 200.7 dBc/Hz FoMAin 65nm CMOS Complete Layout Consid

159、eration Native layer(NT_N)is added to reducethe eddy current and improve tank Q.The GMcells and 4-bit SCAs are placedin the inner space.VN1VN2VN3VN4VP1VP2VP3VP4M9APM8Native Layer(NT_N)GM&Cap-bankGM&Cap-bankGM&Cap-bankGM&SCA 2024 IEEE International Solid-State Circuits Conference24 of 3119.4:A 0.07mm

160、220-to-23.8GHz 8-phase Oscillator Incorporating Magnetic+Dual-Injection Coupling Achieving 189.2dBc/Hz FoM10MHz and 200.7 dBc/Hz FoMAin 65nm CMOS Chip MicrophotographProcess:65nm CMOSSupply voltage:0.55VCore area:0.07mm24-bit SCAs in quad-cores share the identical control words(B0-B3)265 m265 mIQI1Q

161、1B0B1B2B3 2024 IEEE International Solid-State Circuits Conference25 of 3119.4:A 0.07mm220-to-23.8GHz 8-phase Oscillator Incorporating Magnetic+Dual-Injection Coupling Achieving 189.2dBc/Hz FoM10MHz and 200.7 dBc/Hz FoMAin 65nm CMOS Measured PN ProfileCarrier Freq:23.75 GHz100kHz:75.71 dBc/Hz 1MHz:10

162、5.22 dBc/Hz 10MHz:129.31 dBc/HzMeasured PN10MHz=-129.3dBc/Hz at 23.8GHz carrier frequency 2024 IEEE International Solid-State Circuits Conference26 of 3119.4:A 0.07mm220-to-23.8GHz 8-phase Oscillator Incorporating Magnetic+Dual-Injection Coupling Achieving 189.2dBc/Hz FoM10MHz and 200.7 dBc/Hz FoMAi

163、n 65nm CMOS Measured PN and FoM versus FrequencyPN 10MHz varies between-127.7 and-129.3 dBc/HzFoM 10MHz varies between 186.7 and 189.2 dBc/HzPN 10MHz(dBc/Hz)2021222324-129.5-129.0-128.5-128.0-127.5Frequency(GHz)FoM 10MHz(dBc/Hz)2021222324186.5187.0187.5188.0188.5189.0189.5Frequency(GHz)2024 IEEE Int

164、ernational Solid-State Circuits Conference27 of 3119.4:A 0.07mm220-to-23.8GHz 8-phase Oscillator Incorporating Magnetic+Dual-Injection Coupling Achieving 189.2dBc/Hz FoM10MHz and 200.7 dBc/Hz FoMAin 65nm CMOS Measured PN and FoM with 5 Samples PN and FoM variation with 5 samples are 2dB2021222324-12

165、9.5-129.0-128.5-128.0-127.5-127.0Chip1Chip4Chip5Chip3Chip2PN 10MHz(dBc/Hz)Frequency(GHz)FoM 10MHz(dBc/Hz)2021222324185.5186.5187.5188.5189.5Chip1Chip4Chip5Chip3Chip2Frequency(GHz)2024 IEEE International Solid-State Circuits Conference28 of 3119.4:A 0.07mm220-to-23.8GHz 8-phase Oscillator Incorporati

166、ng Magnetic+Dual-Injection Coupling Achieving 189.2dBc/Hz FoM10MHz and 200.7 dBc/Hz FoMAin 65nm CMOS Comparison with State-of-the-ArtFoM=|PN|+20log10(f0/f)10log10(PDC/1mW)FoMA=FoM+10log10(1mm2/A)#With phase error calibration&Estimated from the figures in referenceThis WorkJSSC233JSSC23 4ISSCC19 5JSS

167、C11 2Key TechniqueMagnetic+Dual-injection couplingActive-mixer coupling+loop calibrationTransformer-coupling+Active phase shifterParallel-coupling+RC phase shifterActive-coupling+Interpolative phase tuningNo.of standalone transformer(inductor)14224No.of Phases84448Technology65 nm28 nm28 nm65 nm130 n

168、mTuning Range(TR)(Fminto FmaxGHz)17.4%(20 to 23.8)19.5%(24 to 29.2)18.1%(25.7 to 30.7)41.3%(25 to 38)6.8%(48.6 to 52)Supply(V)0.550.90.60.650.8Power Dissipation PDC(mW)5.86029.217.535Frequency f0(GHz)23.82425.72550.3PN(dBc/Hz)1MHz f105.2110.5111.5108&103.7&10MHz f129.3134133.3129&127.8FoM(dBc/Hz)1MH

169、z f185.1180.3185183.5&182.3&10MHz f189.2184186.8184.5&186.4FoMA(dBc/Hz)1MHz f196.6187.3190.9194186.7&10MHz f200.7191192.7195190.8Phase Error1.50.90.5#2.7&N/ADie Area(mm2)0.070.20.260.090.36 2024 IEEE International Solid-State Circuits Conference29 of 3119.4:A 0.07mm220-to-23.8GHz 8-phase Oscillator

170、Incorporating Magnetic+Dual-Injection Coupling Achieving 189.2dBc/Hz FoM10MHz and 200.7 dBc/Hz FoMAin 65nm CMOS Benchmark with 4-and 8-phase OscillatorsState-of-the-art FoM(FoMA)10MHzfor the multi-phase mm-wave oscillators rangingbetween 17 to 62GHz20304050 60 70160165170175180185190W.L.NG,JSSC 07Ch

171、en,JSSC 23Bhat,ISSCC 19Iesurum,JSSC 23Hekmat,JSSC 15Cho,JSSC 06Wu,TCAS-I 14Szortyka,ISSCC 14Zhang,JSSC 19Rong,JSSC 11Rong,JSSC 11Decanis,JSSC 11This WorkFoM 10MHz(dBc/Hz)4-phase8-phaseFrequency(GHz)1601701801902004-phase8-phaseThis WorkW.L.NG,JSSC 07Hekmat,JSSC 15Decanis,JSSC 11Rong,JSSC 11Rong,JSSC

172、 11Szortyka,ISSCC 14Wu,TCAS-I 14Cho,JSSC 06Zhang,JSSC 19Chen,JSSC 23Bhat,ISSCC 19Iesurum,JSSC 2320304050 60 70Frequency(GHz)FoMA 10MHz(dBc/Hz)2024 IEEE International Solid-State Circuits Conference30 of 3119.4:A 0.07mm220-to-23.8GHz 8-phase Oscillator Incorporating Magnetic+Dual-Injection Coupling A

173、chieving 189.2dBc/Hz FoM10MHz and 200.7 dBc/Hz FoMAin 65nm CMOS Conclusions 8-phase oscillator incorporating magnetic+dual-injection coupling-Magnetic coupling induces 8-phase outputs without PN penalty from couplingnetwork.-Dual-injection coupling reduces the PN and phase error,simultaneously.-Wind

174、mill-shaping transformer compact the chip area significantly.8-phase oscillator prototype in 65nm CMOS-Superior FoM(FoMA)at 10MHz offset:186.7 to 189.2(198.2 to 200.7)dBc/Hz-Small FoM(PN)variation with 5-chip measurements:200m Even ModeOdd ModeDual effective inductance&modesNot applicable to quad-co

175、re topologyRedundant wiring of mode switch introduces large parasitics19.5:A 13.7-to-41.5GHz 214.1dBc/Hz FoMTQuad-Core Quad-Mode VCO Using an Oscillation-Mode-Splitting Technique 2024 IEEE International Solid-State Circuits Conference13 of 30Proposed Oscillation-Mode-Splitting TechniqueQuad effectiv

176、e inductance&modesQuad core improve PN by 6 dBShort synchronization path between adjacent cores19.5:A 13.7-to-41.5GHz 214.1dBc/Hz FoMTQuad-Core Quad-Mode VCO Using an Oscillation-Mode-Splitting Technique 2024 IEEE International Solid-State Circuits Conference14 of 30Proposed Oscillation-Mode-Splitti

177、ng TechniqueSmall Cm(48fF in total)is used for a balanced frequency arrangement19.5:A 13.7-to-41.5GHz 214.1dBc/Hz FoMTQuad-Core Quad-Mode VCO Using an Oscillation-Mode-Splitting Technique 2024 IEEE International Solid-State Circuits Conference15 of 30Circuit Implementation and ConsiderationVDDSWM9AP

178、M2M312 m/60nm SWM2M312 m/60nm ModeSwitchCore#2Core#1kkVDDLauxL1SWM4M512 m/60nm SWM6M712 m/60nm ModeSwitchCore#3Core#4kkVDDLauxLauxL1L1Cm=24fFModeSwitchCmCm12 m16 mSW8 m/60nm SWSW8 m/60nm Mode Switch8 m/60nm SWSW64 m/60nm 14fF14fF112fF112fFVtuneShieldingSwitched-CapacitorP1N1P2N2 NMOS Mode switch:low

179、 RC parasitics 4bit switch cap.+1bit varactor:continuous tuning with low Kvco19.5:A 13.7-to-41.5GHz 214.1dBc/Hz FoMTQuad-Core Quad-Mode VCO Using an Oscillation-Mode-Splitting Technique 2024 IEEE International Solid-State Circuits Conference16 of 30Circuit Implementation and ConsiderationCm=24fFMode

180、 SWMode SWM4M5M6M7SWSWL2L1LauxkVDDVDDVDD12 m/60nm SWMode SWM0M1M2M3SWM9AP12 m/60nm L1L112 m/60nm 12 m/60nm LauxkkkSW8 m/60nm SWSW8 m/60nm LauxLaux8 m/60nm SWSW64 m/60nm 14fF14fF112fF112fFVtuneShielding16 m12 mMode SwitchesSwitched-CapacitorCore-3Core-4Core-1Core-2Power deliveryFixed Cm(MOMCap)Passiv

181、e layout considerationHigh Q inductor implemented by thick M9(W=16m)Fixed MoM Cmplaced at center for symmetryPower delivery network implemented by top metal19.5:A 13.7-to-41.5GHz 214.1dBc/Hz FoMTQuad-Core Quad-Mode VCO Using an Oscillation-Mode-Splitting Technique 2024 IEEE International Solid-State

182、 Circuits Conference17 of 30Quad-Core Quad-Mode Configuration Operation condition of mode#1 Main“8”-shaped inductor:even modeInductor L2is plugged in the oscillatorAuxiliary tank:magnetically enhancedL1and Laux:in-phase coupled(+Maux)Effective inductance:L1+L2+Mauxmode#1=(L1+L2+Maux)(4C+2Cm)-1/2Freq

183、uency tuning range:13.7-17.7GHz19.5:A 13.7-to-41.5GHz 214.1dBc/Hz FoMTQuad-Core Quad-Mode VCO Using an Oscillation-Mode-Splitting Technique 2024 IEEE International Solid-State Circuits Conference18 of 30Quad-Core Quad-Mode Configuration Operation condition of mode#2 Main“8”-shaped inductor:odd modeI

184、nductor L2is transparentAuxiliary tank:magnetically enhancedL1and Laux:in-phase coupled(+Maux)Effective inductance:L1+Mauxmode#2=(L1+Maux)4C-1/2Frequency tuning range:17.1-23.6GHz19.5:A 13.7-to-41.5GHz 214.1dBc/Hz FoMTQuad-Core Quad-Mode VCO Using an Oscillation-Mode-Splitting Technique 2024 IEEE In

185、ternational Solid-State Circuits Conference19 of 30Quad-Core Quad-Mode Configuration Operation condition of mode#3 Main“8”-shaped inductor:even modeInductor L2is plugged in the oscillatorAuxiliary tank:magnetically canceledL1and Laux:anti-phase coupled(-Maux)Effective inductance:L1+L2-Mauxmode#3=(L1

186、+L2-Maux)(4C+2Cm)-1/2Frequency tuning range:22.9-30.3GHz19.5:A 13.7-to-41.5GHz 214.1dBc/Hz FoMTQuad-Core Quad-Mode VCO Using an Oscillation-Mode-Splitting Technique 2024 IEEE International Solid-State Circuits Conference20 of 30Quad-Core Quad-Mode Configuration Operation condition of mode#4 Main“8”-

187、shaped inductor:odd modeInductor L2is transparentAuxiliary tank:magnetically canceledL1and Laux:anti-phase coupled(-Maux)Effective inductance:L1-Mauxmode#4=(L1-Maux)4C-1/2Frequency tuning range:28.7-41.5GHz19.5:A 13.7-to-41.5GHz 214.1dBc/Hz FoMTQuad-Core Quad-Mode VCO Using an Oscillation-Mode-Split

188、ting Technique 2024 IEEE International Solid-State Circuits Conference21 of 30Chip MicrographVCO CoreOutput BufferDecoupling Capacitor520mGGSGGS280m 65nm CMOS Process Core Area:0.14mm219.5:A 13.7-to-41.5GHz 214.1dBc/Hz FoMTQuad-Core Quad-Mode VCO Using an Oscillation-Mode-Splitting Technique 2024 IE

189、EE International Solid-State Circuits Conference22 of 30Measured Phase Noise19.5:A 13.7-to-41.5GHz 214.1dBc/Hz FoMTQuad-Core Quad-Mode VCO Using an Oscillation-Mode-Splitting Technique 2024 IEEE International Solid-State Circuits Conference23 of 30Measured Phase Noise19.5:A 13.7-to-41.5GHz 214.1dBc/

190、Hz FoMTQuad-Core Quad-Mode VCO Using an Oscillation-Mode-Splitting Technique 2024 IEEE International Solid-State Circuits Conference24 of 30Measured Phase Noise19.5:A 13.7-to-41.5GHz 214.1dBc/Hz FoMTQuad-Core Quad-Mode VCO Using an Oscillation-Mode-Splitting Technique 2024 IEEE International Solid-S

191、tate Circuits Conference25 of 30Measured Phase Noise19.5:A 13.7-to-41.5GHz 214.1dBc/Hz FoMTQuad-Core Quad-Mode VCO Using an Oscillation-Mode-Splitting Technique 2024 IEEE International Solid-State Circuits Conference26 of 30Measured Tuning Range of Each ModeMinimal Overlap=0.6 GHz Minimal frequency

192、overlap between adjecent modes is 0.6GHz19.5:A 13.7-to-41.5GHz 214.1dBc/Hz FoMTQuad-Core Quad-Mode VCO Using an Oscillation-Mode-Splitting Technique 2024 IEEE International Solid-State Circuits Conference27 of 30PN1MHzPN10MHzFoMT10MHzFoM10MHzMeasured PN,FoM&FoMTversus FrequencyPN1MHz:-111.2 to-98.3

193、dBc/HzPN10MHz:-133.2 to-124.4 dBc/HzFoM10MHz:194.0 to 184.4 dBc/HzFoMT10MHz:214.1 to 204.5 dBc/Hz19.5:A 13.7-to-41.5GHz 214.1dBc/Hz FoMTQuad-Core Quad-Mode VCO Using an Oscillation-Mode-Splitting Technique 2024 IEEE International Solid-State Circuits Conference28 of 30Comparsion with Prior Multi-Mod

194、e Oscillators19.5:A 13.7-to-41.5GHz 214.1dBc/Hz FoMTQuad-Core Quad-Mode VCO Using an Oscillation-Mode-Splitting Technique 2024 IEEE International Solid-State Circuits Conference29 of 30Comparsion with Prior Multi-Mode OscillatorsThe first multi-mode VCO with FoMTover 210dBc/Hz and FTR 100%!19.5:A 13

195、.7-to-41.5GHz 214.1dBc/Hz FoMTQuad-Core Quad-Mode VCO Using an Oscillation-Mode-Splitting Technique 2024 IEEE International Solid-State Circuits Conference30 of 30Conclusion Multi-core multi-mode using mode-splitting technique Auxiliary tanks split quad modes from dual through in/anti-phase coupling

196、“8”-Shaped inductor topology achieves small L with high Q at mmWaveQuad-core topology improve phase noise by 6 dB 13.7-to-41.5GHz Oscillator prototype in 65nm CMOS Phase noise at 10MHz:-133.2 to-124.4 dBc/HzFoM at 10MHz:194.0 to 184.4 dBc/HzFoMTat 10MHz:214.1 to 204.5 dBc/Hz(FTR=101%)19.5:A 13.7-to-41.5GHz 214.1dBc/Hz FoMTQuad-Core Quad-Mode VCO Using an Oscillation-Mode-Splitting Technique 2024 IEEE International Solid-State Circuits Conference31 of 30Please Scan to Rate Please Scan to Rate This PaperThis Paper