SESSION 26 - Display and User Interaction Technologies.pdf

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1、ISSCC 2024SESSION 26Display and User Interaction Technologies26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference1 of 57A 600ch 10b Source-Driver IC wit

2、h a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile DisplaysYousung Park1,Gyeong-Gu Kang1,Gyu-Wan Lim1,Seunghwa Shin1,Yong-Sung Ahn2,Wonyoun Kim2,andHyun-Sik Kim11KAIST,Daejeon,Korea2LX Semicon,Seoul,Korea26.1:A 600ch 10b Source-Driver IC with a Charge-

3、Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference2 of 57Motivation and Prior WorksProposed 10-bit Source-Driver IC(SD-IC)Concept of Charge-Modulation(QM)DACV-to-Q Converter(VQC)with Error Correctio

4、n SchemeCharge Modulator and Voltage-Interpolative InjectionPath-Swapping Fast Slew Rate(PS-FSR)Buffer AmplifierMeasurement ResultsConclusions&AcknowledgementOutline26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile

5、 Displays 2024 IEEE International Solid-State Circuits Conference3 of 57Motivation and Prior WorksProposed 10-bit Source-Driver IC(SD-IC)Concept of Charge-Modulation(QM)DACV-to-Q Converter(VQC)with Error Correction SchemeCharge Modulator and Voltage-Interpolative InjectionPath-Swapping Fast Slew Rat

6、e(PS-FSR)Buffer AmplifierMeasurement ResultsConclusions&AcknowledgementOutline26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference4 of 57Architecture of

7、 Display Driving SystemSD-IC converts RGB data to an analog voltage(=pixels grayscale).BGRBGRBGRBGRUHD 38402160 PanelScan Driver1st rowLast rowOLEDTiming-Contr.RGB DataCtrl SigChannel#1Channel#2Channel#3Channel#(N-1)Channel#(N-2)Source-Driver IC(Multi-Channel SD-ICs)Channel#NLogicBufferDACLong Heigh

8、tNarrow PitchDACAnalogVDACDigitalDATARGBBufOLED BrightnessDATARGBSD-IC Operation1-Channel SD-IC26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference5 of

9、57Key Metrics:1.SD-IC Channel SizeBoosting integration of SD-IC is necessary for high-resolution display image.26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits

10、 Conference6 of 57Key Metrics:2.SD-IC Drive SpeedBoosting speed of SD-IC Higher frame rate Lower motion blur26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Co

11、nference7 of 57Prior Works:Fully R-DAC Structure(10b)VREFHVREFLV 210-1V 210-2V 1V 0Global 10b R-StringShift RegisterLatch Stacks1024-to-1Voltage SelectorCLKLevel ShifterDataLoadD9:01VOUTV 1023:0Fully R-DACVREFHVREFLVOUT1Global 10b R-String=Logic(S/R,Latches,L/S)Buffer1024-to-1 Voltage Selector(R-DAC

12、)Large Channel Area R-DAC size 210 Low Speed Buffer Limited slew-rate26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference8 of 57Prior Works:Interpolativ

13、e DAC Structure(10b)Logic(S/R,Latches,L/S)Buffer6-bit R-DAC 2Sub-DACVREFHVREFLV 26-1V 26-2V 1V 0Global 6b R-StringLogic(S/R Latches,L/S)CLKDataLoad6-bit1VOUTV 26-1:0Linear InterpolationVREFHVREFLVOUTGlobal 10b R-String=VHVL26-to-2R-DAC4-bit Sub-DAC4-bitVHVL1 Size Reduction Using sub-DAC Low Speed Bu

14、ffer Limited slew-rate 2 R-DAC 26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference9 of 57Prior Works:Interpolative DAC Structure(10b)Logic(S/R,Latches,

15、L/S)Buffer6-bit R-DAC 2Sub-DACVREFHVREFLV 26-1V 26-2V 1V 0Global 6b R-StringLogic(S/R Latches,L/S)CLKDataLoad6-bit1VOUTV 26-1:0Linear InterpolationVREFHVREFLVOUTGlobal 10b R-String=VHVL26-to-2R-DAC4-bitVHVL1 Size Reduction Using sub-DAC Low Speed Buffer Limited slew-rate 2 R-DAC Which Sub-DAC?4-bit

16、Sub-DAC26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference10 of 57Prior Work:DAC-Embedded Amplifier26.1:A 600ch 10b Source-Driver IC with a Charge-Modu

17、lation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference11 of 57Prior Work:Switched-Capacitor(SC)DAC26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable

18、for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference12 of 57Proposed ArchitectureSingle-stage Non-linear Arch.VREFHVREFL2M-to-2 RDACGmHGmLSumVHVLD/A conv.+Buf.VREFHVREFL2M-to-2 RDACVHVLBufVDACSeries True-DC Arch.Non-linear free Speed Degrade(Drive-after-Conver

19、sion)Split DAC&AmpD/A conv.Buf.High speed(Conversion-while-Drive)Parallelize DAC&AmpParallel True-DC Arch.VREFHVREFL2M-to-2 RDACVHVLTrue-DCHigh speedDACProposed 10b SD-IC with a Charge-Modulation DACSizeSpeedLinearityVOUTD/A conv.Buf.Buf26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC

20、Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference13 of 57Motivation and Prior WorksProposed 10-bit Source-Driver IC(SD-IC)Concept of Charge-Modulation(QM)DACV-to-Q Converter(VQC)with Error Correction SchemeCharge

21、 Modulator and Voltage-Interpolative InjectionPath-Swapping Fast Slew Rate(PS-FSR)Buffer AmplifierMeasurement ResultsConclusions&AcknowledgementOutline26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024

22、 IEEE International Solid-State Circuits Conference14 of 57VLVHVSTEPV=(VH-VL)0IOQVO0IMMQQ=CO VMV/Q Conv.VLVHVOUTMQ InjectionMQCF=MVV-to-Q Converter1VSTEPCOVOIOCharge ModulatorVLMirroring IOVOUTCharge InjectionCF(=CO)IMIOVL Virtual Gnd.IMMConcept of Charge-Modulation QM DAC(1/3)A drive of a voltage-s

23、tep of V(VH VL)into COforms Q(=COV).26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference15 of 57VLVHVSTEPV=(VH-VL)0IOQVO0IMMQQ=CO VMV/Q Conv.VLVHVOUTMQ

24、InjectionMQCF=MVV-to-Q Converter1VSTEPCOVOIOCharge ModulatorVLMirroring IOVOUTCharge InjectionCF(=CO)IMIOVL Virtual Gnd.IMMConcept of Charge-Modulation QM DAC(2/3)Simultaneously,Q is copied and modulated with a factor of M.26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Ho

25、rizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference16 of 57VLVHVSTEPV=(VH-VL)0IOQVO0IMMQQ=CO VMV/Q Conv.VLVHVOUTMQ InjectionMQCF=MVV-to-Q Converter1VSTEPCOVOIOCharge ModulatorVLMirroring IOVOUTCharge InjectionCF(=CO)IMIOVL Virtu

26、al Gnd.IMMConcept of Charge-Modulation QM DAC(3/3)Modulated charge is injected into CFto output a modulated voltage(MV).26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State

27、 Circuits Conference17 of 57Proposed 10b SD-IC featuring Q-Modulation DACVHVL26-to-2 Voltage-SelectorVHVL1COCF(=CO)VOUT=VL+MVVSTEPVHVLV-to-Q ConverterQ-ModulatorMQ=COVFast D/A Fine ModulationFast Coarse Buffering Highly Linear(true-DC domain)Highly Fast(conversion-while-drive)(e.g.M=1/2)Global Resis

28、tor stringVREFHVREFLMSB bitsDLSB bitsD6bit Coarse DACProposed Fast QM 4bit Fine DAC10bit Analog VOUTVQ-Injection26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuit

29、s Conference18 of 57Q-InjectionVHVL26-to-2 Voltage-SelectorVH1COVOUT=VL+MVVSTEPVHVLV-to-Q Converter Q-ModulatorMQ=COVFast D/A Fine ModulationFast Coarse Buffering(e.g.M=1/2)Global Resistor stringVREFHVREFLMSB bitsDLSB bitsD6bit Coarse DACProposed Fast QM 4bit Fine DAC10bit Analog VOUTMost Essential

30、Requirements Define Errorless Q Fast V-to-Q ConversionVLVCF(=CO)Proposed 10b SD-IC featuring Q-Modulation DAC26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits C

31、onference19 of 57Motivation and Prior WorksProposed 10-bit Source-Driver IC(SD-IC)Concept of Charge-Modulation(QM)DACV-to-Q Converter(VQC)with Error Correction SchemeCharge Modulator and Voltage-Interpolative InjectionPath-Swapping Fast Slew Rate(PS-FSR)Buffer AmplifierMeasurement ResultsConclusions

32、&AcknowledgementOutline26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference20 of 57Architecture of Basic VQCBasic VQC consists of a multiplexer,a compar

33、ator,and a current source.VSTEPRstVSW10VHVL11IFCOVOBasic V-to-Q Converter Errorless Q Fast ConversionCOVSTEPVHVLQ=COVVO1VHVLV-to-Q ConverterVSTEP GenerationQ Conversion from V26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-R

34、ate Mobile Displays 2024 IEEE International Solid-State Circuits Conference21 of 57Operational Phases of Basic VQC(1/3)At 1=high,VSTEPand VOare initialized to VH.VSTEPRstVSW0VHVL11IFCOVOVLVHTransient ResponseIO01VSTEP0IFQBasic VQC w/Ideal CMP(Initializing Phase)IOt0t1t21VO26.1:A 600ch 10b Source-Dri

35、ver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference22 of 57Operational Phases of Basic VQC(2/3)At 1=low,VSTEP(=VL)activates the fall of VOwith a slope of IF/CO.RstVSTEPVSWVHVL11I

36、FCOVOVLVHTransient ResponseIO01VSTEP0IFQBasic VQC w/Ideal CMP(Conversion Phase)1IO1t0t1t2VOSlope=IF/CO26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conferen

37、ce23 of 57Operational Phases of Basic VQC(3/3)Q is measured by IF(t2-t1).VSTEPRstVSWVHVL11IFCOVOVLVHTransient ResponseIO01VSTEP0IFQBasic VQC w/Ideal CMP(Conversion Done)VO1IO1Slope=IF/COt0t1t2=IF(t2-t1)26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s

38、 Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference24 of 57Accuracy Deterioration of VQCVE,caused by comparators latency,leads to QEdegrading linearity.VSTEPRstVSWVHVL11IFCOVOVLVHTransient ResponseIO01VSTEP0IFQBasic VQC w/Non-Ideal CMP(VE:Delay)1IO1

39、t0t1t2VEVEVOSlope=IF/CO VE-induced poor Linearity+QEt326.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference25 of 57VSTEPRstVSWVHVL11IFCOVOVLVHTransient R

40、esponseIO1VSTEP0IFQPrior Comparator Error Compensation1IO1t0t1t2VEVEVOSlope=IF/COIRVSW0QE+(-QE)=0 Long Correction time(t4)t4t36 JSSC06Prior Slow Error Compensation Technique 6Long correction time(t3tt4)is not acceptable.Prior technique utilized an extra pushing current of IR(IF).26.1:A 600ch 10b Sou

41、rce-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference26 of 57Proposed Rapid Error Cancellation TechniqueVE-free VQC demands one extra multiplexer attached to CO.Q10VSTEPRstV

42、SWVHVL11IFCOVOVLVHTransient ResponseIO1VSTEP0IFQProposed Rapid VE-Cancellation technique 11IOt0t1t2VEVEVO00t4102VLVH2,10t4 Low Overhead26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE Internatio

43、nal Solid-State Circuits Conference27 of 57Operational Phases of Proposed VQC(1/6)Same initialization,while applying VLto bottom of COwith 2=high.Q0VSTEPRstVSWVHVL11IFCOVOVLVHTransient ResponseIO1VSTEP0IFQProposed VE-Cancellation(Initializing Phase)11IOt0t1t2VEVE00t402VLVH2,10t4VO26.1:A 600ch 10b So

44、urce-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference28 of 57Operational Phases of Proposed VQC(2/6)At 1=low,VOfalls below VLdue to a comparator delay.Q1VSTEPRstVSWVHVL11IF

45、COVOVLVHTransient ResponseIO1VSTEP0IFQProposed Rapid VE-Cancellation technique 11IOt0t1t2VEVE00t402VLVH2,10t4VO26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits

46、 Conference29 of 57Operational Phases of Proposed VQC(3/6)VOstops changing when it becomes VL-VE.Q1VSTEPRstVSWVHVL11IFCOVOVLVHTransient ResponseIO1VSTEP0IFQProposed Rapid VE-Cancellation technique 11IOt0t1t2VEVE00t402VLVH2,10t4VOVO=VL-VE26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC

47、Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference30 of 57Q1VSTEPRstVSWVHVL11IFCOVOVLVHTransient ResponseIO1VSTEP0IFQProposed Rapid VE-Cancellation technique 11IOt0t1t2VEVE00t42VLVH2,10t4VOVO=VL-VEVO=VH-VE1V Shift

48、-UpVOperational Phases of Proposed VQC(4/6)Then,VOincreases by V to become VH-VE.At 2=low,the bottom of COis shifted up from VLto VH.26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE Internationa

49、l Solid-State Circuits Conference31 of 57Q1VSTEPRstVSWVHVL11IFCOVOVLVHTransient ResponseIO1VSTEP0IFQProposed Rapid VE-Cancellation technique 11IOt0t1t2VEVE00t42VLVH2,10t4VOVO=VH-VE1V Shift-UpOperational Phases of Proposed VQC(5/6)After that,VOfalls below VLwith the same comparator delay.Incrementing

50、 VOturns IFback on.26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference32 of 57Q1VSTEPRstVSWVHVL11IFCOVOVLVHTransient ResponseIO1VSTEP0IFQProposed Rapid

51、 VE-Cancellation technique 11IOt0t1t2VEVE00t42VLVH2,10t4VOVO=VH-VE1VO=VL-VEV Accurate VQC(VE-Cancellation)Fast VQC Operational Phases of Proposed VQC(6/6)As a result,the errorless Q=IF(t4-t2)is made by CO(VH-VL).When VObecomes VL-VE,it no longer changes.26.1:A 600ch 10b Source-Driver IC with a Charg

52、e-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference33 of 571LSB=4.5mVSimulated Transient WaveformsVSTEPVO11.3mV=2.5LSBVE0.3sMSB=011111210mVMSB=1000002 Errorless Q Fast ConversionQ=COVVSWCOVOVLVHIFV

53、STEPProposed V-to-Q ConverterV-LevelAccurateVProposed VQC:Simulation ResultVQC Error:11.3mV(w/o correction)several V(w/VE-correction)Conversion time:1.5s,including short correction time of 800nsLong comparator delay is allowable:CMPs IQ=only 1A26.1:A 600ch 10b Source-Driver IC with a Charge-Modulati

54、on DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference34 of 57Motivation and Prior WorksProposed 10-bit Source-Driver IC(SD-IC)Concept of Charge-Modulation(QM)DACV-to-Q Converter(VQC)with Error Correction Schem

55、eCharge Modulator and Voltage-Interpolative InjectionPath-Swapping Fast Slew Rate(PS-FSR)Buffer AmplifierMeasurement ResultsConclusions&AcknowledgementOutline26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displa

56、ys 2024 IEEE International Solid-State Circuits Conference35 of 57Proposed Charge Modulator and InjectionQ-modulator consists of a current DAC(MIF)activated by the shared VSW.QTransient Response2IFQIOt0t1t20t4t4IMMIF1Q=COVCOVOVLVHIFVSTEPProposed VQCMIFLSB bitsDVLVSWCF(=CO)2VOUTInterpolative Q-Inject

57、ionQ-ModulatorIMVLIOVOUT26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference36 of 57Operational Phases of Charge Injection(1/3)Error-mixed charge is ign

58、ored by main buffer unity-gain configuration.QTransient Response2IFQIOt0t1t20t4t4IMMIF1Q=COVCOVOVLVHIFVSTEPProposed VQCMIFLSB bitsDVLVSWCF(=CO)2VOUTIMVLIOVOUTIgnored26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile

59、 Displays 2024 IEEE International Solid-State Circuits Conference37 of 57Operational Phases of Charge Injection(2/3)Errorless charge(Q)is modulated and simultaneously injected into CF.QTransient Response2IFQIOt0t1t20t4t4IMMIF1Q=COVCOVOVLVHIFVSTEPProposed VQCMIFLSB bitsDVLVSWCF(=CO)2VOUTIMVLIOVOUTMQM

60、V26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference38 of 57Operational Phases of Charge Injection(3/3)Injecting MIFinto CFduring tONproduces MV,finali

61、zing 10b VOUT.QTransient Response2IFQIOt0t1t20t4t4IMMIF1Q=COVCOVOVLVHIFVSTEPProposed VQCMIFLSB bitsDVLVSWCF(=CO)2VOUTIMVLIOVOUTMQVL+MVtON=IFtON26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE In

62、ternational Solid-State Circuits Conference39 of 57Implementation of Charge Modulator4b current-mode Q-modulator comprises binary weighted current sources.Q=COVCOVOVLVHIFVSTEPProposed VQCMIFLSB bitsDVLVSWCF(=CO)2VOUTQ-ModulatorIMIOIF,VSWVBIASVSS2423222120Binary-weighted IMVSW controlled IF VSWQ-Modu

63、latorDDDD*M=i=0324-iD i 26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference40 of 57a26-to-2 Voltage-SelectorVHVLGlobal Resistor stringVREFHVREFLMSB bit

64、sD101VSWCO2VLVH10MSW,4MSW,NMF,NMF,N24DNN=VL2VOUTCF2N6b Coarse DACVoltage-to-Charge Converter(VQC)4b Q-Modulator&InjectionTop Structure of 1-Channel SD-IC26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 20

65、24 IEEE International Solid-State Circuits Conference41 of 57a26-to-2 Voltage-SelectorVHVLGlobal Resistor stringVREFHVREFLMSB bitsD101VSWCO2VLVH10MSW,4MSW,NMF,NMF,N24DNN=VL2VOUTCF2N6b Coarse DACVoltage-to-Charge Converter(VQC)4b Q-Modulator&Injection Fast Slew-Rate Buffer neededTop Structure of 1-Ch

66、annel SD-IC26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference42 of 57Motivation and Prior WorksProposed 10-bit Source-Driver IC(SD-IC)Concept of Charg

67、e-Modulation(QM)DACV-to-Q Converter(VQC)with Error Correction SchemeCharge Modulator and Voltage-Interpolative InjectionPath-Swapping Fast Slew Rate(PS-FSR)Buffer AmplifierMeasurement ResultsConclusions&AcknowledgementOutline26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-

68、Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference43 of 57Auxiliary Slew Boosting Stage(1/3)Auxiliary fast slew-rate(FSR)stage adds IBSTto boost buffer bias current.VFSR+VFSR-ISRISRVDDVSSM1M4M2M3M5M6M7M8M9M10M11M121:11:11:11:

69、AIOUTVDZIBSTAuxiliary Slew BoostingVFSR+VFSR-IOUTIBIASVINVOUTTransient ResponseVFSR-VINVOUTVFSR+t0t1t2t3IOUTVHIGHVDZVOUTSR IBSTIBST=A2ISRIBST0VINVLOW26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 I

70、EEE International Solid-State Circuits Conference44 of 57Auxiliary Slew Boosting Stage(2/3)When VIN(=VFSR+)VOUT(=VFSR-),IBIASis boosted up by A2ISR.ISRVFSR+VFSR-ISRISRVDDVSSM1M4M2M3M5M6M7M8M9M10M11M121:11:11:11:AIOUTVDZIBSTAuxiliary Slew BoostingVFSR+VFSR-IOUTIBIASVINVOUTTransient ResponseVFSR-VINVO

71、UTVFSR+=A2ISR=A2ISRt0t1t2t3IOUTVHIGHVDZVOUTSR IBSTIBST0VINVLOWIBST=A2ISR26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference45 of 57VFSR+VFSR-ISRISRVDDV

72、SSM1M4M2M3M5M6M7M8M9M10M11M121:11:11:11:AIOUTVDZIBSTVFSR+VFSR-IOUTIBIASVINVOUTTransient ResponseVFSR-VINVOUTVFSR+=0 Operate only in Rising Caset0t1t2t3IOUTVHIGHVDZVOUTSmoothSettlingIBST0VINVLOWAuxiliary Slew Boosting Stage(3/3)This FSR stage boosts slew-rate only in rising case.When VIN(=VFSR+)VOUT(

73、=VFSR-),IBSTdecays to 0.26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference46 of 57Proposed Path-Swapping FSR(PS-FSR)BufferPS-FSR covers both rise/fall

74、 cases with a solitary IBST-boosting circuit.IBST,FVFSR+VFSR-IBIASIBST,RVFSR+VFSR-IOUTVINVOUTVIN VOUT Rising CaseVIN VOUTVIN VOUTVIN BRisingFallingDATA 2bMemDigitally Slew Direction DetectionProposed Path-Swapping FSR(PS-FSR)BufferAccording to rise/fall direction,the front-end interconnection is rec

75、onfigured.Rise or Fall is determined by comparing current MSB 2b with previous one.26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference48 of 57IBIASIBST

76、VFSR+VFSR-IOUTVINVOUTVIN VOUTVIN VOUT Both Case Area-and Power-EfficientRisingFallingProposed Path-Swapping FSR Buffer Transient ResponseIOUTVDZVIN0VLOWVHIGHIBSTVFSR-VINVOUTVFSR+VFSR-VINVOUTVFSR+00DATA 1100Falling101Proposed Path-Swapping FSR(PS-FSR)BufferPS-FSR energy-efficiently accelerates buffer

77、s responsiveness.The path-swapped front-end interconnection ensures always VFSR+VFSR-.26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference49 of 57Motiva

78、tion and Prior WorksProposed 10-bit Source-Driver IC(SD-IC)Concept of Charge-Modulation(QM)DACV-to-Q Converter(VQC)with Error Correction SchemeCharge Modulator and Voltage-Interpolative InjectionPath-Swapping Fast Slew Rate(PS-FSR)Buffer AmplifierMeasurement ResultsConclusions&AcknowledgementOutline

79、26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference50 of 571-Channel Layout of Proposed SD-IC and Die MicrographProposed 10b SD-IC featuring QM-DAC,des

80、igned by 180nm CMOS.Global R-stringTiming Controller5.0mm5.0mmBias Block300 column channels300 column channels1-ChannelLayoutProposed 10b SD-IC Channel 100m10b Digital Logics(S/R,Latch,L/S,2b CMP)15m6b R-DAC(PTL)84mVQC4b Q-Modulator71mFSRStage21mBufferAmplifier45m2 MIM Caps layered on circuitsTechno

81、logyChannel Number Drive Volt.RangeBit ResolutionTarget DisplayTarget Frame RateTarget 1-H TimeSD-IC 1-H Time180nm CMOS600 Channels0.25V to 4.85V10-bitUHD(38402160)240Hz1.9s1.5sDisplay Target&SpecificationsDie Micrograph Conversion-while-Drive High Speed Charge Modulation DAC26.1:A 600ch 10b Source-

82、Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference51 of 5722V/s2V/s1s1VSlew RateMeasurement 0.25V4.85V1s1VMeasured Outputfor D sweep000162FF1637F163FF1627F161FF1617F160FF1607

83、F161-H Time(1.5s)270162721627416276162781627A1627C1627E162LSB10mV0.5s1LSB=4.5mVw/PS-FSR(IQ=1.4A)w/o PS-FSR(IQ=1.2A)Measured Outputfor D sweepMeasured Output WaveformsSlew-rate 10 x enhancement:2V/s(w/o PS-FSR)22V/s(w/PS-FSR)10b conversion and drive are completed within 1.5s(=1-H time)26.1:A 600ch 10

84、b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference52 of 57Measured Linearity and DVO DVO=Deviation of Voltage Output1 LSB=4.5mV26.1:A 600ch 10b Source-Driver IC with

85、 a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference53 of 57Measurement Environment and Mini-LED Demo DisplayPower SupplyImage DataFPGAData+Ctrl SignalAnalogSignalMini-LED DisplayDriver Boar

86、dFabricatedSD-IC Gradation Man Cat Bridge26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference54 of 57Comparison TableTechnologyGray ScaleOutput RangeDAC

87、 ArchitectureDNL/INLMax.DVOStatic Current(IQ)Slew Rate RLOAD/CLOADJSSC19 1TCAS20 2ISSCC22 4VLSI23 5This WorkDAC+Buffer Areaper Channel(Area Ratio*)1-Horizontal Time(Time Ratio*)180nm CMOS80nm CMOS130nm CMOS180nm CMOS180nm CMOS10-bit10-bit10-bit10-bit10-bit0.3 V to 4.5 V0.1 V to 4.9 V0.2 V to 17.8 V1

88、.0 V to 6.0 V0.25 V to 4.85 V0.31/0.58 LSB1.65 mV2.5*V/s 10k/46pF10 x 680 m2(2.1x)0.14*/0.46*LSB0.39/0.9 LSB 0.37/1.17 LSB 0.21/1.21 LSB16.0 mV4.82 mV15.5 mV11.5 mV7.0 A-1.8 A2.4 A1.7 A13.6*V/s 5k/300pF8.1*V/s 30k/30pF42V/s 3k/100pF22V/s 3k/100pF15 x 221 m2(1x)23 x 395 m2(2.7x)16 x 144 m2(0.7x)16.7

89、x 132 m2(0.7x)1.5 s(Fastest 1x)8.0 s(5.3x)8.0 s(5.3x)3.3 s(2.2x)5.6 s(3.7x)DAC-embedded amplifierDAC-embedded amplifierSwitched-CapDACSwitched-CapDACQ-ModulationDACJSSC21 3Fully R-DAC+SC-amplifier10-bit90nm CMOS0.2 V to 4.8 V0.2/0.42 LSB2.8 A7.9 mV18 x 263 m2(1.4x)3.8*V/s 30k/30pF3.8*s(2.5x)*Simulat

90、ed results*Estimation from measured waveforms*1-channel area of each reference paper/1-channel area of this work*1-horizontal time of each reference paper/1-horizontal time of this work26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240

91、Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference55 of 57Motivation and Prior WorksProposed 10-bit Source-Driver IC(SD-IC)Concept of Charge-Modulation(QM)DACV-to-Q Converter(VQC)with Error Correction SchemeCharge Modulator and Voltage-Interpolative InjectionPath-S

92、wapping Fast Slew Rate(PS-FSR)Buffer AmplifierMeasurement ResultsConclusions&AcknowledgementOutline26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference5

93、6 of 57Technical challenges of conventional SD-ICSequential operation of“drive after D/A conversion”prolongs 1-H timeSmall-signal domain(gm-based)interpolation leads to significant non-linearity Proposed QM DAC realizes“conversion-while-drive”in parallel mannerFast charge-based processing accelerate

94、s D/A conversion timeCharge-injecting interpolation during voltage drive can reduce 1-H time significantlyTrue-DC domain voltage interpolation enhances DAC linearity Error-correction scheme in VQC allows a long delay of comparator,reducing IQPS-FSR stage improves the slew rate by 10 x w/minimum over

95、headImplementation of 600-channel 10-bit Source Driver IC(SD-IC)1-H time of 1.5s 2x 5x faster 1-H time compared to prior artsSuitable for 240Hz super-frame-rate mobile displaysCompetitive die area efficiencyVisual demonstration with a mini-LED displayConclusion26.1:A 600ch 10b Source-Driver IC with

96、a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference57 of 57This work was supported byLX Semicon Co.,Ltd.,Korea.Acknowledgment26.1:A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Ac

97、hieving 1-Horizontal Time of 1.5s Suitable for 240Hz-Frame-Rate Mobile Displays 2024 IEEE International Solid-State Circuits Conference58 of 57Please Scan to Rate This PaperIEEE Biomedical Circuits and Systems Conference26.2:A Fully Nonlinear Compact 10b Source Driver with Low-Voltage Gamma Slope DA

98、C and Data/Phase Dependent Current Modulation Achieving 2411m2/Channel for Mobile OLED Displays1 of 33 2024 IEEE International Solid-State Circuits ConferenceJaewoongAhn1,Seung Hun Choi1,JunyeolAn1,Ki-Duk Kim2,and Hyung-Min Lee11Korea University,Seoul,Korea 2C&Tech,Seoul,KoreaA Fully Nonlinear Compa

99、ct 10b Source Driver with Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Modulation Achieving 2411m2/Channel for Mobile OLED DisplaysIEEE Biomedical Circuits and Systems Conference26.2:A Fully Nonlinear Compact 10b Source Driver with Low-Voltage Gamma Slope DAC and Data/Phase Dependent

100、 Current Modulation Achieving 2411m2/Channel for Mobile OLED Displays2 of 33 2024 IEEE International Solid-State Circuits Conference Motivation Proposed Source Driver Low Voltage Gamma Slope DAC MSB-Dependent Segment Restorer Data/Phase-Dependent Current Modulation Measurement Results ConclusionOutl

101、ineIEEE Biomedical Circuits and Systems Conference26.2:A Fully Nonlinear Compact 10b Source Driver with Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Modulation Achieving 2411m2/Channel for Mobile OLED Displays3 of 33 2024 IEEE International Solid-State Circuits ConferenceOutline Moti

102、vation Proposed Source Driver Low Voltage Gamma Slope DAC MSB-Dependent Segment Restorer Data/Phase-Dependent Current Modulation Measurement Results ConclusionIEEE Biomedical Circuits and Systems Conference26.2:A Fully Nonlinear Compact 10b Source Driver with Low-Voltage Gamma Slope DAC and Data/Pha

103、se Dependent Current Modulation Achieving 2411m2/Channel for Mobile OLED Displays4 of 33 2024 IEEE International Solid-State Circuits ConferenceIntroduction of Source Driver ICSource Driver IC(SD-IC)drives the pixels in the panelDisplay quality is closely related to SD-ICDisplay DataSignalTiming Con

104、troller(T-Con)DC-DCPowerConverter(PMIC)Gate Driver ICSource Driver ICGamma Reference VoltageDCPowerRGB DataControl SignalPanelSub Pixel1-Channel Source Driver ICDigitalLogicDACBUFRGB DataCTRLNonlinearGammaReference VoltagePixelDigital InputAnalog OutputAnalog OutputRelation Between Display and SD-IC

105、DisplaySD-ICHigh ResolutionHigh Color DepthHigh DAC ResolutionCost EffectiveSmall Channel Silicon AreaLow PowerLow Power Consumption in BufOverall Block Diagram of the Display Driver IC SystemIEEE Biomedical Circuits and Systems Conference26.2:A Fully Nonlinear Compact 10b Source Driver with Low-Vol

106、tage Gamma Slope DAC and Data/Phase Dependent Current Modulation Achieving 2411m2/Channel for Mobile OLED Displays5 of 33 2024 IEEE International Solid-State Circuits ConferenceLogic10-bit HV RDACDBuf.CLKDataLoadVVOUTCHVREFLVREFHGlobal 10-bit R-StringVVVVVVInput DataVREFLVREFHDAC OutputNonlinearGamm

107、a CurveVOUTPrev.Studies 1:Fully Nonlinear RDACCan cover fully nonlinear gamma voltageLarge AreaSilicon area exponentially grows as the resistor DAC(RDAC)resolution increasesHigh voltage(HV)MOSFET1 Kim,ISSCC 23IEEE Biomedical Circuits and Systems Conference26.2:A Fully Nonlinear Compact 10b Source Dr

108、iver with Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Modulation Achieving 2411m2/Channel for Mobile OLED Displays6 of 33 2024 IEEE International Solid-State Circuits ConferenceLogic6-bit HV NonlinearRDACDBuf.CLKDataLoadVVOUTCHVREFLVREFHGlobal 6-bit R-StringVVVVVVInput DataVREFLVREF

109、HDAC OutputNonlinearGamma CurveVOUTDVLVHVLVHLinearSub-DAC4-bit HV LinearSub-DACPrev.Studies 2:Piecewise-Linear InterpolationSmall AreaN-bit RDAC M-bit Nonlinear RDAC+(N-M)-bit Linear Sub-DACStill using HV MOSFETCannot cover fully nonlinear gamma voltage2 Kim,JSSC 143 Lee,TCE 194 Kang,VLSI 215 Shin,V

110、LSI 23IEEE Biomedical Circuits and Systems Conference26.2:A Fully Nonlinear Compact 10b Source Driver with Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Modulation Achieving 2411m2/Channel for Mobile OLED Displays7 of 33 2024 IEEE International Solid-State Circuits ConferenceLogic10-b

111、it LV RDACDCLKDataLoadLVVOUTCHVREFL/4VREFH/4Global 10-bit R-StringLVLVLVLVLVLVBuf.MultiplyingStageVREFHVREFH/4VREFL/4LVFSVREFLFSVDACVOUTx4MultiplyingStageVDACLow Voltage Full Scale(FS)Prev.Studies 3:Low Voltage MOSFET DACSmall areaLow Voltage(LV)MOSFET switch size HV MOSFET switch sizeMultiplying st

112、ageMultiplies noise and error from LV DAC6 Kim,JSSC 217 Lim,ISSCC 22IEEE Biomedical Circuits and Systems Conference26.2:A Fully Nonlinear Compact 10b Source Driver with Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Modulation Achieving 2411m2/Channel for Mobile OLED Displays8 of 33 20

113、24 IEEE International Solid-State Circuits ConferenceProposed LV DAC SD-ICSmall areaLV gamma slope DACAdding Stage:MSB-Dependent Segment Restorer(MDSR)Low Power Adaptive tail current:Data/Phase Dependent Current Modulation(DPCM)Logic8-bit LV DACDCLKDataLoadSLPVOUTCHVDACMDSRSegSlope GeneratorMUXVADDD

114、DDPCMVREFLVREFLVDACVOUTAdding StageVDACVADDVOUT=VDAC+VADDBuf.IEEE Biomedical Circuits and Systems Conference26.2:A Fully Nonlinear Compact 10b Source Driver with Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Modulation Achieving 2411m2/Channel for Mobile OLED Displays9 of 33 2024 IEEE

115、 International Solid-State Circuits ConferenceOutline Motivation Proposed Source Driver Low Voltage Gamma Slope DAC MSB-Dependent Segment Restorer Data/Phase-Dependent Current Modulation Measurement Results ConclusionLogic8-bit LV Gamma Slope DACDCLKDataLoadSLPVOUTCHVDACMDSRSegSlope GeneratorMUXVADD

116、DDDPCMBuf.IEEE Biomedical Circuits and Systems Conference26.2:A Fully Nonlinear Compact 10b Source Driver with Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Modulation Achieving 2411m2/Channel for Mobile OLED Displays10 of 33 2024 IEEE International Solid-State Circuits ConferenceDigi

117、tal CodeS/HS/HS/HS/HVDACVADDVSPL1001620016300163FF16Output VoltageVREFH00016SegProposed LV DAC ConceptNonlinear Gamma Voltage OutputSLP Gen.111100000121111000010211110000112VOUTMDSR22 to 1 MUXVADDVADDVADDVADDVREFLSegSegSegSegMSB 2-bitD22 to 1 HV MUX LSB 8-bitD2-bit Slope+8-bit LV DAC 11110000002MSB:

118、30016(VADD)3C0163C1163C2163C316C016012102112Input+VOUT=VSPLVADDSegVADD-VADD8-bit LV Gamma Slope DACProposedLV DAC ConceptVREFL00016SegLV Gamma Slope DAC Concept LV DAC without piecewise-linear interpolation Restore LV DAC output without multiplying stageIEEE Biomedical Circuits and Systems Conferenc

119、e26.2:A Fully Nonlinear Compact 10b Source Driver with Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Modulation Achieving 2411m2/Channel for Mobile OLED Displays11 of 33 2024 IEEE International Solid-State Circuits ConferenceS/HS/HS/HS/HVDACVADDVSPL1001620016300163FF16Output VoltageVR

120、EFH00016SegProposed LV DAC ConceptNonlinear Gamma Voltage OutputSLP Gen.111100000121111000010211110000112VOUTMDSR22 to 1 MUXVADDVADDVADDVADDVREFLSegSegSegSegMSB 2-bitD22 to 1 HV MUX LSB 8-bitD2-bit Slope+8-bit LV DAC 11110000002MSB:30016(VADD)3C0163C1163C2163C316C016012102112Input+VOUT=VSPLVADDSegVA

121、DD-VADD8-bit LV Gamma Slope DAC10b input=3(sub 2b)C(sub 4b)1(sub 4b)16VREFL00016VREFL1001620016300163FF16Output Voltage00016Digital CodeVREFLVREFH(1/4)Slope Generator Divide fully nonlinear gamma voltages by MSB 2-bit:Seg,VADD Shift each segment down into the LV region Slope generator generates 2-bi

122、t slopes corresponding to SegIEEE Biomedical Circuits and Systems Conference26.2:A Fully Nonlinear Compact 10b Source Driver with Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Modulation Achieving 2411m2/Channel for Mobile OLED Displays12 of 33 2024 IEEE International Solid-State Circ

123、uits ConferenceS/HS/HS/HS/HVDACVADDVSPL1001620016300163FF16Output VoltageVREFH00016SegProposed LV DAC ConceptNonlinear Gamma Voltage OutputSLP Gen.111100000121111000010211110000112VOUTMDSR22 to 1 MUXVADDVADDVADDVADDVREFLSegSegSegSegMSB 2-bitD22 to 1 HV MUX LSB 8-bitD2-bit Slope+8-bit LV DAC 11110000

124、002VREFL=VADDC016C216C316C016012102112SampleC116+VOUT=VSPLVADDSegVADD-VADD8-bit LV Gamma Slope DAC10b input=3(sub 2b)C(sub 4b)1(sub 4b)16VREFL00016VREFL1001620016300163FF16Output Voltage00016Digital CodeVREFLVREFH 8-bit LV gamma slope DAC selects one voltage slope:VDAC MDSR samples one of four volta

125、ge steps in VDAC:VSPL(2/4)LV Gamma Slope DAC&Sampling IEEE Biomedical Circuits and Systems Conference26.2:A Fully Nonlinear Compact 10b Source Driver with Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Modulation Achieving 2411m2/Channel for Mobile OLED Displays13 of 33 2024 IEEE Inter

126、national Solid-State Circuits ConferenceS/HS/HS/HS/HVDACVADD1001620016300163FF16Output VoltageVREFH00016SegProposed LV DAC ConceptNonlinear Gamma Voltage OutputSLP Gen.111100000121111000010211110000112VOUTMDSR22 to 1 MUXVADDVADDVADDVADDVREFLSegSegSegSegMSB 2-bitD22 to 1 HV MUX LSB 8-bitD2-bit Slope+

127、8-bit LV DAC 11110000002MSB:30016(VADD)+VOUT=VSPLVADDSegVADD-VADD8-bit LV Gamma Slope DAC10b input=3(sub 2b)C(sub 4b)1(sub 4b)16VREFL00016VREFL1001620016300163FF16Output Voltage00016Digital CodeVREFLVREFHVSPL Multiplexer(MUX)selects corresponding adding voltage:VADD Bottom voltage changed from VREFL

128、to VADD(3/4)Additional Voltage SelectionIEEE Biomedical Circuits and Systems Conference26.2:A Fully Nonlinear Compact 10b Source Driver with Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Modulation Achieving 2411m2/Channel for Mobile OLED Displays14 of 33 2024 IEEE International Solid

129、-State Circuits ConferenceS/HS/HS/HS/HVDACVADD1001620016300163FF16Output VoltageVREFH00016SegProposed LV DAC ConceptNonlinear Gamma Voltage OutputSLP Gen.111100000121111000010211110000112VOUTMDSR22 to 1 MUXVADDVADDVADDVADDVREFLSegSegSegSegMSB 2-bitD22 to 1 HV MUX LSB 8-bitD2-bit Slope+8-bit LV DAC 1

130、1110000002MSB:30016(VADD)3C0163C1163C2163C316C016012102112Output+VOUT=VSPLVADDSegVADD-VADD8-bit LV Gamma Slope DAC10b input=3(sub 2b)C(sub 4b)1(sub 4b)16VREFL00016VREFL1001620016300163FF16Output Voltage00016VREFHDigital CodeVREFLVSPL(4/4)Restoring MDSR combines VSPLwith VADD Restore LV gamma voltage

131、 without multiplying stageIEEE Biomedical Circuits and Systems Conference26.2:A Fully Nonlinear Compact 10b Source Driver with Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Modulation Achieving 2411m2/Channel for Mobile OLED Displays15 of 33 2024 IEEE International Solid-State Circuit

132、s ConferenceLogic8-bit LV Gamma Slope DACDCLKDataLoadSLPVOUTCHVDACMDSRSegSlope GeneratorMUXVADDDDDPCMBuf.Outline Motivation Proposed Source Driver Low Voltage Gamma Slope DAC MSB-Dependent Segment Restorer Data/Phase-Dependent Current Modulation Measurement Results ConclusionIEEE Biomedical Circuits

133、 and Systems Conference26.2:A Fully Nonlinear Compact 10b Source Driver with Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Modulation Achieving 2411m2/Channel for Mobile OLED Displays16 of 33 2024 IEEE International Solid-State Circuits ConferenceMSB-Dependent Segment Restorer Operate

134、s in three phases:Sampling(SPL),Driving(DRV),Restoring(RST)Composed of upper source follower(USF),lower source follower(LSF),buffer amplifier,and sampling capacitor(CS)VOUTCircuit ImplementationTiming Diagram1-H timeDriving(DRV)Restoring(RST)Sampling(SPL)SSPLSGSSRSTVDAC4LSBCSVOSSRSTSRSTSGSVADDVSG,UP

135、VDACSSPLSSPLVSG,LWVREFLVSPL=Sampled Value of VDACUSFLSF(VSPL)Buf.IEEE Biomedical Circuits and Systems Conference26.2:A Fully Nonlinear Compact 10b Source Driver with Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Modulation Achieving 2411m2/Channel for Mobile OLED Displays17 of 33 2024

136、 IEEE International Solid-State Circuits ConferenceVOUTCircuit ImplementationTiming Diagram1-H timeDriving(DRV)Restoring(RST)Sampling(SPL)SSPLSGSSRSTVDAC4LSBCSVOSSRSTSRSTSGSVADDVSG,UPVDACSSPLSSPLVSG,LWVREFLVSPL=Sampled Value of VDACUSFLSF(VSPL)Buf.VOUTPhaseSamplingVREFL+VSG,LWMSB-Dependent Segment R

137、estorer:Sampling Sampling the one of VDACby SGSwith LSB 2-bit VSPLsampled through the push-pull USFIEEE Biomedical Circuits and Systems Conference26.2:A Fully Nonlinear Compact 10b Source Driver with Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Modulation Achieving 2411m2/Channel for

138、 Mobile OLED Displays18 of 33 2024 IEEE International Solid-State Circuits ConferenceMSB-Dependent Segment Restorer:Sampling To reduce the loading effect,USF isolates CSfrom gamma voltage slopes Charge and discharge from USF S/H does not effect to reference R-stringCIN SF Input Capacitance(CIN,SF)Ch

139、arge/Discharge from Source FollowerCIN Loading Effect(ISF)CSSGSSFVDACVOUTVREFLLoadISFCS CIN,SFTStepOffset Does not Settle in TStepCharge/Discharge from R-string(IR,String)CIN Loading Effect CSSGSCIN CSVREFLLoadVOUTIR-StringVDACW/Source FollowerW/O Source FollowerIEEE Biomedical Circuits and Systems

140、Conference26.2:A Fully Nonlinear Compact 10b Source Driver with Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Modulation Achieving 2411m2/Channel for Mobile OLED Displays19 of 33 2024 IEEE International Solid-State Circuits Conference Level shift of VDACvalues by VSG,UPwhen sampled in

141、 CS USF and LSF use the same size and bias VSG,UPand VSG,LWare identicalMSB-Dependent Segment Restorer:SamplingConceptual Circuit ImplementationVSG Shift CompensationVOUTCSVOSSRSTSGSVSG,UPVDACSSPLVSG,LWVREFLUSFLSF(VSPL)Buf.(VSPL+VSG,UP)-(VREFL+VSG,LW+VOS)SamplingVSPL-(VREFL+VOS)VREFLVOUTCSVDACUSFLSF

142、VREFL+VSG,LW+VOSVSPL+VSG,UPIEEE Biomedical Circuits and Systems Conference26.2:A Fully Nonlinear Compact 10b Source Driver with Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Modulation Achieving 2411m2/Channel for Mobile OLED Displays20 of 33 2024 IEEE International Solid-State Circui

143、ts ConferenceVOUTCircuit ImplementationTiming Diagram1-H timeDriving(DRV)Restoring(RST)Sampling(SPL)SSPLSGSSRSTVDAC4LSBCSVOSSRSTSRSTSGSVADDVSG,UPVDACSSPLSSPLVSG,LWVREFLVSPL=Sampled Value of VDACUSFLSF(VSPL)Buf.VOUTPhaseDrivingVADDMSB-Dependent Segment Restorer:Driving The input of the buffer amplifi

144、er changes from VREFL+VSG,LWto VADD DRVallows time to settle down to VADD77 Lim,ISSCC 22IEEE Biomedical Circuits and Systems Conference26.2:A Fully Nonlinear Compact 10b Source Driver with Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Modulation Achieving 2411m2/Channel for Mobile OLE

145、D Displays21 of 33 2024 IEEE International Solid-State Circuits ConferenceMSB-Dependent Segment Restorer:Restoring The buffer amplifier forms another negative feedback loop through the CS The sampled value in CSis added to VADDfor generating VOUTVOUTCircuit ImplementationTiming Diagram1-H timeDrivin

146、g(DRV)Restoring(RST)Sampling(SPL)SSPLSGSSRSTVDAC4LSBCSVOSSRSTSRSTSGSVADDVSG,UPVDACSSPLSSPLVSG,LWVREFLVSPL=Sampled Value of VDACUSFLSF(VSPL)Buf.VOUTPhaseRestoringVADD+VSPL-VREFLIEEE Biomedical Circuits and Systems Conference26.2:A Fully Nonlinear Compact 10b Source Driver with Low-Voltage Gamma Slope

147、 DAC and Data/Phase Dependent Current Modulation Achieving 2411m2/Channel for Mobile OLED Displays22 of 33 2024 IEEE International Solid-State Circuits ConferenceLogic8-bit LV Gamma Slope DACDCLKDataLoadSLPVOUTCHVDACMDSRSegSlope GeneratorMUXVADDDDDPCMBuf.Outline Motivation Proposed Source Driver Low

148、 Voltage Gamma Slope DAC MSB-Dependent Segment Restorer Data/Phase-Dependent Current Modulation Measurement Results ConclusionIEEE Biomedical Circuits and Systems Conference26.2:A Fully Nonlinear Compact 10b Source Driver with Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Modulation A

149、chieving 2411m2/Channel for Mobile OLED Displays23 of 33 2024 IEEE International Solid-State Circuits ConferenceData/Phase-Dependent Current Modulation The tail current(IT)typically sets the value that can ensure the worst case DPCM can provide adaptively optimized tail currentProposed DPCM with Buf

150、fer AmplifierVB5VIN,PVOUTVB4VB3VB6VB1VB2HVDDC1C20.5IBIBDTailDTailITITData/Phase Dependent Current SourceVIN,N0.5IB0.5IB0.5IBIB0.5IB0.5IBIEEE Biomedical Circuits and Systems Conference26.2:A Fully Nonlinear Compact 10b Source Driver with Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Mo

151、dulation Achieving 2411m2/Channel for Mobile OLED Displays24 of 33 2024 IEEE International Solid-State Circuits ConferenceData/Phase-Dependent Current ModulationControlled by each input data and operation phase SPL:Using LSB 2-bit/DRV:Using MSB 2-bit/RST:Minimum IT Average value of ITduring 1-H time

152、(I1H,avg)decrease 50%Implementation of the DPCMMSB0020121021120002001201121112ITIB1.5 IB2 IB2.5 IBDTailVOUTLogic Gen.SRSTSSPLDDHDDHDDHDPCM Sig.Gen.SSPLSPLCurrent Control(33%of 1-H)SDRV DMSBDRV Current Control(17%of 1-H)DTailDMSBDMSBDTailIT=IB33VIN,NVIN,PMSBBin.toTher.DDH0002DLSBDMSBDMSBDMSBSDRV DTai

153、lITLSB111200022.5IBIB002002DTailRST(50%of 1-H)IEEE Biomedical Circuits and Systems Conference26.2:A Fully Nonlinear Compact 10b Source Driver with Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Modulation Achieving 2411m2/Channel for Mobile OLED Displays25 of 33 2024 IEEE International

154、 Solid-State Circuits ConferenceOutline Motivation Proposed Source Driver Low Voltage Gamma Slope DAC MSB-Dependent Segment Restorer Data/Phase-Dependent Current Modulation Measurement Results ConclusionIEEE Biomedical Circuits and Systems Conference26.2:A Fully Nonlinear Compact 10b Source Driver w

155、ith Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Modulation Achieving 2411m2/Channel for Mobile OLED Displays26 of 33 2024 IEEE International Solid-State Circuits ConferenceDie Micrograph Fabricated in a 65-nm 1.5V/5V CMOS technology Targeted a mobile display 30 k and 30 pF load Targ

156、eted for the mobile UHD display panels 1-H time=8.2 sIEEE Biomedical Circuits and Systems Conference26.2:A Fully Nonlinear Compact 10b Source Driver with Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Modulation Achieving 2411m2/Channel for Mobile OLED Displays27 of 33 2024 IEEE Intern

157、ational Solid-State Circuits ConferenceMeasurement Results:Waveform Measured waveforms with five different VOUTcases MDSR can restore the LV DAC output to the original gamma voltage through SPL,DRV,RSTIEEE Biomedical Circuits and Systems Conference26.2:A Fully Nonlinear Compact 10b Source Driver wit

158、h Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Modulation Achieving 2411m2/Channel for Mobile OLED Displays28 of 33 2024 IEEE International Solid-State Circuits ConferenceMeasurement Results:DNL,INL,and DVO Max.DNL=0.49 LSB Max.INL=0.85 LSB Max.DVO=10mVDNL=Differential Non-LinearityI

159、NL=Integral Non-LinearityDVO=Deviation of Voltage OutputIEEE Biomedical Circuits and Systems Conference26.2:A Fully Nonlinear Compact 10b Source Driver with Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Modulation Achieving 2411m2/Channel for Mobile OLED Displays29 of 33 2024 IEEE Int

160、ernational Solid-State Circuits ConferenceArea Comparison Proposed source driver can cover fully nonlinear gamma voltage Enabling a silicon area comparison with 10-bit conventional source driver Proposed 10-bit SD-IC=10.3%of conventional 10-bit SD-ICIEEE Biomedical Circuits and Systems Conference26.

161、2:A Fully Nonlinear Compact 10b Source Driver with Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Modulation Achieving 2411m2/Channel for Mobile OLED Displays30 of 33 2024 IEEE International Solid-State Circuits ConferenceComparison Table Can cover fully nonlinear gamma voltage Smalles

162、t silicon area and area shrinkagePublicationJSSC 2021 6VLSI 2021 4ISSCC 2022 7VLSI 2023 5This workColor Depth(Nonlinear Bit+Interpolation Bit)TechnologyOutput RangeDNL/INL LSBMax.DVOStatic Current per ChannelSilicon Area per ChannelArea ShrinkageBAdaptive Biasing90 nm180 nm130 nm180 nm65 nmFully Non

163、linear 10b(10+0)Piecewise Linear 12b(7+5)Piecewise Linear 10b(8+2)Piecewise Linear 10b(5+4+1)Fully Nonlinear 10b(10+0)0.2 V to 4.8 V0.1 V to 4.9 V0.3 V to 4.5 V0.1 V to 4.9 V0.3 V to 4.7 V0.2/0.420.43/0.950.39/0.90.37/1.170.49/0.857.9 mV7.9 mV4.82 mV15.5 mV10 mV2.8 A 2 A 1.8 A 1.7 A 1.5 AA 5328 m2(2

164、96 x 18)5015 m2(295 x 17)2688 m2(168 x 16)4065 m2(243.4 x 16.7)2411 m2(150.7 x 16)31.0%N/A65.2%52.2%62.5%B,89.7%COXXXOXOXOOB Compared with 8b Conv.SD-ICC Compared with 10b Conv.SD-ICA AveragedNonlinear Gamma Voltage DrinvingIEEE Biomedical Circuits and Systems Conference26.2:A Fully Nonlinear Compac

165、t 10b Source Driver with Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Modulation Achieving 2411m2/Channel for Mobile OLED Displays31 of 33 2024 IEEE International Solid-State Circuits ConferenceOutline Motivation Proposed Source Driver Low Voltage Gamma Slope DAC MSB-Dependent Segmen

166、t Restorer Data/Phase-Dependent Current Modulation Measurement Results ConclusionIEEE Biomedical Circuits and Systems Conference26.2:A Fully Nonlinear Compact 10b Source Driver with Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Modulation Achieving 2411m2/Channel for Mobile OLED Displ

167、ays32 of 33 2024 IEEE International Solid-State Circuits ConferenceConclusion This work presents the smallest channel area(150.7 x 16 m2)among the state-of-the-art SD-ICs for mobile OLED displays while covering fully nonlinear 10-bit gamma voltage LV gamma slope DAC and MSB-dependent segment restore

168、r(MDSR)enable high area efficiencyand restore LV DAC output without multiplication Data/phase-dependent current modulation(DPCM)enable small static current consumption(1.5 A)and provide adaptively optimistic tail current with each input data and operation phase IEEE Biomedical Circuits and Systems C

169、onference26.2:A Fully Nonlinear Compact 10b Source Driver with Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Modulation Achieving 2411m2/Channel for Mobile OLED Displays33 of 33 2024 IEEE International Solid-State Circuits ConferenceThank you26.2:A Fully Nonlinear Compact 10b Source D

170、river with Low-Voltage Gamma Slope DAC and Data/Phase Dependent Current Modulation Achieving 2411m2/Channel for Mobile OLED Displays34 of 33InPlease Scan to Rate This PaperI26.3:Noise Immunity in Capacitive Sensing:Single-Ended AFE Design with Common-Current Subtraction for Mutual-and Self-Capacitan

171、ce Sensing in 390pF Load 2024 IEEE International Solid-State Circuits Conference1 of 30Noise Immunity in Capacitive Sensing:Single-Ended AFE Design with Common-Current Subtraction for Mutual-and Self-Capacitance Sensing in 390pF LoadJun Yeol An1,Seung Hun Choi1,Si-Woo Kim2,Jae-Youl Lee2,Hyung-Min Le

172、e1,and Yoon-Kyung Choi11Korea University,Seoul,Korea2Samsung Electronics,Hwaseong,Korea26.3:Noise Immunity in Capacitive Sensing:Single-Ended AFE Design with Common-Current Subtraction for Mutual-and Self-Capacitance Sensing in 390pF Load 2024 IEEE International Solid-State Circuits Conference2 of 3

173、0Contents Introduction Proposed Analog Front-End(AFE)Unity Gain Buffer Current Conveyor Common-Current Subtraction Signal and Noise Analysis Measurement Results Conclusion26.3:Noise Immunity in Capacitive Sensing:Single-Ended AFE Design with Common-Current Subtraction for Mutual-and Self-Capacitance

174、 Sensing in 390pF Load 2024 IEEE International Solid-State Circuits Conference3 of 30Contents Introduction Proposed Analog Front-End(AFE)Unity Gain Buffer Current Conveyor Common-Current Subtraction Signal and Noise Analysis Measurement Results Conclusion26.3:Noise Immunity in Capacitive Sensing:Sin

175、gle-Ended AFE Design with Common-Current Subtraction for Mutual-and Self-Capacitance Sensing in 390pF Load 2024 IEEE International Solid-State Circuits Conference4 of 30Conventional Mobile Display ModulesConnector.PolarizerDisplay PanelFPCBTSCWindow glassTouch PanelDDI800m Touch Sensing IC&DDI2 pane

176、ls Composed of two separate panels Touch panel(Touch screen panel+Touch readout IC)Display panel(DDI+Pixel TFT)26.3:Noise Immunity in Capacitive Sensing:Single-Ended AFE Design with Common-Current Subtraction for Mutual-and Self-Capacitance Sensing in 390pF Load 2024 IEEE International Solid-State C

177、ircuits Conference5 of 30Display Trend of Flagship SmartphonesGalaxyiPhone20102011201220132014201520162017201820192020202120222023On-cell FlexibleOn-cell FlexibleFlexibleOLEDOLEDFlexibleOLEDLCD26.3:Noise Immunity in Capacitive Sensing:Single-Ended AFE Design with Common-Current Subtraction for Mutua

178、l-and Self-Capacitance Sensing in 390pF Load 2024 IEEE International Solid-State Circuits Conference6 of 30.Touch sensor layerCommon cathode(ELVSS)Display electrodeParasiticcapacitancesSource and gate lines800m400m10mPanel ThicknessOverlay OCTA Y-OCTAVsrcVD-noise Thin form factor display Better qual

179、ity of display Improve flexible display technique“Integrated display panel with touch layer”High parasitic coupling capacitanceLarge Parasitic Cap.in the Integrated Sensor26.3:Noise Immunity in Capacitive Sensing:Single-Ended AFE Design with Common-Current Subtraction for Mutual-and Self-Capacitance

180、 Sensing in 390pF Load 2024 IEEE International Solid-State Circuits Conference7 of 30Challenges Due to Large Parasitic CapacitancesCmCP-CmCSAFEAFEVCAO1VCAO2Baseline Panel OffsetQOffsetCPCBDDisplay NoiseCmCPCP-CmCSVD-NoiseAFEAFEVCAO1VCAO2QD-Noise Due to the transition of DDI output Voltage saturation

181、 Signal power distortion Due to a large charge generated by swing VREF in SC-sensing Voltage saturation Degradation of ADC dynamic range“Significant Display Noise Interference”“Large Baseline Offsets in SC-Sensing”26.3:Noise Immunity in Capacitive Sensing:Single-Ended AFE Design with Common-Current

182、Subtraction for Mutual-and Self-Capacitance Sensing in 390pF Load 2024 IEEE International Solid-State Circuits Conference8 of 30Prior Approach 1:Differential Touch Sensing15Rx105Tx100VCAO(mV)VCAO(mV)VTx=3.3VppS-ProfileSNR-20-401620RxTx5101551015020-20D-Profile100-1-1 0 01-1 00 1-10 0 1IS1+IBIS2+IBIS

183、3+IBIS4+IBn1n2n3n4IS1-IS2+n1IS2-IS3+n2IS3-IS4+n3IS4-IS1+n4D-S Conv.111 1101 1001 1000 1Noise accumulationIS4-IS1+n4n1+n2+n3+n4IS2-IS1+n2+n3+n4IS3-IS1+n3+n4IS1-IS2+n1IS2-IS3+n2IS3-IS4+n3IS4-IS1+n4Diff-sensing Touch Profile(D-Profile)Single-Ended Touch Profile(S-Profile)CBDVTXCmCPCP-CmCSCSCFVCAOiCCVCM

184、VCAOi+1CCVREF Issue of differential Sensing Noise accumulation issue No touch node detection Differential Sensing Compensate both D-Noise and baseline offset using adjacent nodeHwang,ISSCC 201726.3:Noise Immunity in Capacitive Sensing:Single-Ended AFE Design with Common-Current Subtraction for Mutua

185、l-and Self-Capacitance Sensing in 390pF Load 2024 IEEE International Solid-State Circuits Conference9 of 30Prior Approach 2:Mutual-Cap Sensing OnlyExternal Noise Generate by fluorescent or surrounding electronic devices Position-dependentDual-Mode Sensing(240Hz Frame Rate)MC-Sensing+SC-Sensing Multi

186、-touch sensing Better noise-immunity 3D-Profile in MC-sensing with E-Noise-0.8VCAO(V)TxRx121600.884TX Profile Error161284Touch node2D-Profile in SC-sensing with E-Noise011TxNo Error ProfileVCAO(V)261014Touch node26.3:Noise Immunity in Capacitive Sensing:Single-Ended AFE Design with Common-Current Su

187、btraction for Mutual-and Self-Capacitance Sensing in 390pF Load 2024 IEEE International Solid-State Circuits Conference10 of 30Contents Introduction Proposed Analog Front-End(AFE)Unity Gain Buffer Current Conveyor Common-Current Subtraction Signal and Noise Analysis Measurement Results Conclusion26.

188、3:Noise Immunity in Capacitive Sensing:Single-Ended AFE Design with Common-Current Subtraction for Mutual-and Self-Capacitance Sensing in 390pF Load 2024 IEEE International Solid-State Circuits Conference11 of 30Timing Budget and Drivability Requirements The required AFE should possess high drivabil

189、ity(low input impedance andhigh driving current)A sample timing diagram for mutual-and self-cap sensing 1-frame(1/240Hz=4.16ms)SC(X-axis)SC(Y-axis)MC3.12ms0.52ms0.52msTx1Tx16Tx2TIVTx13s195s(65cycle)8s520s(65cycle)Self-cap.SensingCmCPVTXZINTSPCCCC based AFEICCVREFDelay=BW1xn+SRV(n:times oftime consta

190、nt)SR=CPIMAXBW=CPxZin1,26.3:Noise Immunity in Capacitive Sensing:Single-Ended AFE Design with Common-Current Subtraction for Mutual-and Self-Capacitance Sensing in 390pF Load 2024 IEEE International Solid-State Circuits Conference12 of 30Conventional Current Conveyor We need a faster CC than the pri

191、or CC for on-cell flexible OLED display.Lee,JSSC 2022Hwang,ISSCC 2017IBias IINCMFBVREFMP1MP2MP3A1MN1MN2MN3IOUTVB1VB2IBiasIINIOUTVREFMN1MP1MN2MP2MP3MN3MN4MP4MP5MN5MP6MN6MN7Only Push or Pull StructureOpen Loop StructureHigh Input ImpedancePush-Pull StructureOpen Loop StructureHigh Input ImpedanceZin=1

192、/gm26.3:Noise Immunity in Capacitive Sensing:Single-Ended AFE Design with Common-Current Subtraction for Mutual-and Self-Capacitance Sensing in 390pF Load 2024 IEEE International Solid-State Circuits Conference13 of 30A CCII with High Drivability&Output-Duplication Capability(a)A Current Conveyor us

193、ing Unity-Gain Buffer(CCIIUGB)IXXYZPNVY+-IZVX=VY;IZ=IX;IY=0(b)Simplified diagramXMN1MN2MP1MP2VBN1VBP1VBN2VBP2VBN3VBP3YMN3MN4MN5MN6MN7MN8MP3MP4MP5MP6MP7MP8MN9MN10MP9MP10ZPN Push-Pull structure Closed-loop structure Low input impedanceZin=Rout/(1+Av)26.3:Noise Immunity in Capacitive Sensing:Single-End

194、ed AFE Design with Common-Current Subtraction for Mutual-and Self-Capacitance Sensing in 390pF Load 2024 IEEE International Solid-State Circuits Conference14 of 30Contents Introduction Proposed Analog Front-End(AFE)Unity Gain Buffer Current Conveyor Common-Current Subtraction Signal and Noise Analys

195、is Measurement Results Conclusion26.3:Noise Immunity in Capacitive Sensing:Single-Ended AFE Design with Common-Current Subtraction for Mutual-and Self-Capacitance Sensing in 390pF Load 2024 IEEE International Solid-State Circuits Conference15 of 30Proposed Single-Ended Sensing Method(a)Differential

196、sensing(b)Single-ended sensing with CCSVREFIRXi-IRXi+1IRXi+1IRXiVREFIRXi-IavgIRXi+1IRXiIRXi+1-IavgCGPCGNpMOS common gatenMOS common gateIRXi+1-IRXi+2CCIIUGBNegative current mirrorCommon-Current Subtraction(CCS)26.3:Noise Immunity in Capacitive Sensing:Single-Ended AFE Design with Common-Current Subt

197、raction for Mutual-and Self-Capacitance Sensing in 390pF Load 2024 IEEE International Solid-State Circuits Conference16 of 30Unity-Gain Buffer CC(UGB CC)A CC w/closed loop amp.High-drivability Common-Current Subtraction(CCS)CM-component cancelation No need of profile conversion Overall Architecture

198、of the Proposed AFEVTXCmCPVD-NoiseTouch ProfileVE-NoiseRXNRX1Touch Screen Panelx1VREFx1x1CCII w/Unity Gain BufferIRX1x1ICCSIRX1dxNxNCommon-Current Subtraction BlockVCMVCAO1CFRST_CA2ndorder ADCfTXBS126.3:Noise Immunity in Capacitive Sensing:Single-Ended AFE Design with Common-Current Subtraction for

199、Mutual-and Self-Capacitance Sensing in 390pF Load 2024 IEEE International Solid-State Circuits Conference17 of 30Contents Introduction Proposed Analog Front-End(AFE)Unity Gain Buffer Current Conveyor Common-Current Subtraction Signal and Noise Analysis Measurement Results Conclusion26.3:Noise Immuni

200、ty in Capacitive Sensing:Single-Ended AFE Design with Common-Current Subtraction for Mutual-and Self-Capacitance Sensing in 390pF Load 2024 IEEE International Solid-State Circuits Conference18 of 30VREFIRXi+1IRXiCommon-Current Subtraction(CCS)CGPCGNCCIIPNZYXCCIIPNZYXVTXCPCmCPCmVCMVCAOiCFQFiVCMVCAOi+

201、1CFQFi+1VELVSSVELVSS=1 =0D-noise componentD-noise componentin the CCS output The D-noise component is successfully subtracted by CCS In the output signal,common-mode signal is subtractedSignal Analysis:D-Noise Interference26.3:Noise Immunity in Capacitive Sensing:Single-Ended AFE Design with Common-

202、Current Subtraction for Mutual-and Self-Capacitance Sensing in 390pF Load 2024 IEEE International Solid-State Circuits Conference19 of 30=+()1=1()1 =()1=1 Mutual-cap.baseline componentBaseline componentin the CCS outputMutual-cap signalAvg.mutual-cap signalVREFIRXi+1IRXiCommon-Current Subtraction(CC

203、S)CGPCGNCCIIPNZYXCCIIPNZYXVTXCPCmCPCmCmiVCMVCAOiCFQFiVCMVCAOi+1CFQFi+1VELVSS The AFE with CCS generate single-ended touch profile.Signal Analysis:Mutual-Cap Sensing26.3:Noise Immunity in Capacitive Sensing:Single-Ended AFE Design with Common-Current Subtraction for Mutual-and Self-Capacitance Sensin

204、g in 390pF Load 2024 IEEE International Solid-State Circuits Conference20 of 30Signal Analysis:Self-Cap SensingVREFIRXi+1IRXiCommon-Current Subtraction(CCS)CGPCGNCCIIPNZYXCCIIPNZYXVTXCPCmCPCmCSiVCMVCAOiCFQFiVCMVCAOi+1CFQFi+1VELVSS=+1=1 1 =1=1 Self-cap.baseline componentBaseline componentin the CCS o

205、utput The baseline component(Cp)is successfully compensated In the output signal,common-mode signal is subtractedSelf-cap signalAvg.self-cap signal26.3:Noise Immunity in Capacitive Sensing:Single-Ended AFE Design with Common-Current Subtraction for Mutual-and Self-Capacitance Sensing in 390pF Load 2

206、024 IEEE International Solid-State Circuits Conference21 of 30Circuit Noise Comparison with Diff.-Sensing(a)Differential sensing(b)Single-ended sensing with CCS=1+2+1+3+1+4+1=1+1=12+3+4Common-mode noiseVREFVREFCGPCGN1234nDSinCCSi142326.3:Noise Immunity in Capacitive Sensing:Single-Ended AFE Design w

207、ith Common-Current Subtraction for Mutual-and Self-Capacitance Sensing in 390pF Load 2024 IEEE International Solid-State Circuits Conference22 of 30Contents Introduction Proposed Analog Front-End(AFE)Unity Gain Buffer Current Conveyor Common-Current Subtraction Signal and Noise Analysis Measurement

208、Results Conclusion26.3:Noise Immunity in Capacitive Sensing:Single-Ended AFE Design with Common-Current Subtraction for Mutual-and Self-Capacitance Sensing in 390pF Load 2024 IEEE International Solid-State Circuits Conference23 of 30Chip Micrograph Process:65nm CMOS Chip Area per Ch.:23 m x 576.5 mC

209、hip MicrographESD&SwapperESD&Swapper&Mux&MuxPanel DriverADC Timing ControllerLogic&BiasADCProp.AFEDS ver.Proposed Touch Sensor1chADCProposed AFE214.4m362.1m23m16ch3550m1900mPower SupplyOscilloscopeOscilloscopeFunction Gen.Test BoardLumped model Display PanelFPGATest Set-up Use a lumped model of on-c

210、ell flexible OLED panel26.3:Noise Immunity in Capacitive Sensing:Single-Ended AFE Design with Common-Current Subtraction for Mutual-and Self-Capacitance Sensing in 390pF Load 2024 IEEE International Solid-State Circuits Conference24 of 30Mutual-Capacitance Sensing Performance5101520250CCS1 D-Profile

211、2 S-ProfileAFE SNR dB-50050-500501030507090Sample-5005064.3mV10305070901030507090VCAOmV4.5mVrmsWorst case noise66.7mV6.3mVrmsAdjacent Node(D-Profile)Worst case noise7.9mVrmsCCS1DS(D-Profile)2DS(S-Profile)24.1716.5720.74VCAOmVVCAOmVNoise accumulation The touch profile conversion process reducethe SNR

212、 of differential sensing.The SNR of CCS AFE is 7.6dBhigher than the SNR of differential sensing AFE.26.3:Noise Immunity in Capacitive Sensing:Single-Ended AFE Design with Common-Current Subtraction for Mutual-and Self-Capacitance Sensing in 390pF Load 2024 IEEE International Solid-State Circuits Con

213、ference25 of 30Display Noise Immunity Test Use an electrical model of DDI and ELVSS layer CCS preventsthe voltage saturation of the charge amplifier.VD-NoiseELVSSDisplaydataELVDD390pFRxDisplaylayer80604020VCAO(mV)Signal Error3.3Vpp2.2VppCCS Sample0-50500-505011.6dB10.1dBDisplay data(3.3Vpp)24681012C

214、CSDiff.AFE SNRdB26.3:Noise Immunity in Capacitive Sensing:Single-Ended AFE Design with Common-Current Subtraction for Mutual-and Self-Capacitance Sensing in 390pF Load 2024 IEEE International Solid-State Circuits Conference26 of 30Self-Capacitance Sensing Performance Successfully drive the ref.signa

215、l at 125kHz and 0.5Vppwith a 390pF load.SNR of the CCS AFE is 6.9dBhigher than the DS AFE in SC-sensing after DCMS.1.22.01.6VRxV500mV8sUGB CC(fDRV=125kHz)VRxVREFTime050-50SNRavg:19.1dB8.4mVrms68.9mVVCAOmV1DS(D-Profile)CS=1pF050-50SNRworst:14.0dB11.5mVrmsVCAOmV1DS(S-Profile)Sample050-50SNRavg:20.9dB7

216、0.8mV8mVrmsWorst case noiseVCAOmV80604020CCSSample806040208060402026.3:Noise Immunity in Capacitive Sensing:Single-Ended AFE Design with Common-Current Subtraction for Mutual-and Self-Capacitance Sensing in 390pF Load 2024 IEEE International Solid-State Circuits Conference27 of 30Implemented ADC Per

217、formance with MC-sensing The proposed CCS readout IC achieved 39.3dB at 240Hz with a 390pF load.The proposed CCS readout IC for MC-sensing ensuresa performance of 28.3dBwith a 1nF load.OSR=128(240Hz)Digital Data Sample204060800-0.4-0.20.20.400.020.04-0.02-0.04 Noise Sample0.27440.003(rms)SNR=39.3dB2

218、0406080OSR=256(120Hz)0.26870.0021(rms)SNR=42.3dBPNoise21xDigital Data SampleNoise SampleSampleCP pF0200400600800100020304050SNR dB28.334.039.343.346.750.636.5OSR=128(240Hz)26.3:Noise Immunity in Capacitive Sensing:Single-Ended AFE Design with Common-Current Subtraction for Mutual-and Self-Capacitanc

219、e Sensing in 390pF Load 2024 IEEE International Solid-State Circuits Conference28 of 30Comparison TablePublicationTechnology65-nm CMOSSupply Voltage VTX:3.3RX:3.3Touch Screen PanelLine SensorTouch read-out SchemeCurrent conveyor Electrode16 x 16Sensor16Area per Ch mm2Power per Ch W Sensing MethodMC-

220、sensingSC-sensingSNR dBFrame Rate Hz240112(MC)/530b(SC)0.01339.3/100fF(MC)20.9c/1pF(SC)390pF LoadISSCC 23 1845-nm CMOS1.1/3.3/5/6.6Matrix SensorCurrent conveyor+NARSN/A216(2 x 108)0.12770SC-sensing12045.8/500fF100pF LoadISSCC 17 17180-nm CMOSTX:3.3RX:1.8Line SensorCurrent conveyor 28 x 50500.04d140M

221、C-sensing12053.3/FingerJSSC 22 15110-nm CMOSTX:3.3RX:1.5Line SensorCurrent conveyor.0.033120MC-sensing1.2msa48.4a/1.5pF 0pF Load40.1a/1.5pF 480pF Load Sensing Load pF1000(MC)390(SC)100(SC)30(MC)480(MC)D-noise MitigationCCS(No noise accumulation)NARS,Diff.sensingDiff.sensing-Baseline CompensationCCSB

222、CC-This WorkdSinc2 decimation filter included.cOnly AFE SNR with OSR=2a SNR=10 xlogResolution Input range,Conversion timebAFE(Static&Dynamic)+ADC(Static)Power 26.3:Noise Immunity in Capacitive Sensing:Single-Ended AFE Design with Common-Current Subtraction for Mutual-and Self-Capacitance Sensing in

223、390pF Load 2024 IEEE International Solid-State Circuits Conference29 of 30Conclusion We proposed a noise-immune touch readout IC that is more suitable for the on-cell flexible OLED line Panel.The proposed AFE effectively eliminates display noise and baseline offset,preventing voltage saturation.The

224、SNR of touch AFE using the proposed CCS mechanismachieves 24.17dB with a 390pF load.This work presents the smallest channel area(23x576.5m2)and the lowest total power consumption(112W in MC-sensing and 530W during SC-sensing)among the state-of-the-arts26.3:Noise Immunity in Capacitive Sensing:Single

225、-Ended AFE Design with Common-Current Subtraction for Mutual-and Self-Capacitance Sensing in 390pF Load 2024 IEEE International Solid-State Circuits Conference30 of 30Thank you26.3:Noise Immunity in Capacitive Sensing:Single-Ended AFE Design with Common-Current Subtraction for Mutual-and Self-Capaci

226、tance Sensing in 390pF Load 2024 IEEE International Solid-State Circuits Conference31 of 30Please Scan to Rate This Paper26.4:A 620pF-Compensated Dual-Mode Capacitance Readout IC for Sub-Display TSP with VRR Scan 2024 IEEE International Solid-State Circuits Conference1 of 31A 620pF-Compensated Dual-

227、Mode Capacitance Readout IC for Sub-Display TSP with VRR ScanJunmin Lee*1,Juwon Ham*1,Hamin Lee1,Wooseok Jang1Byungcheol So2,Hyeongjoon Kim2,Seunghoon Ko11Kwangwoon University,Seoul,Korea2Zinitix,Suwon,Korea26.4:A 620pF-Compensated Dual-Mode Capacitance Readout IC for Sub-Display TSP with VRR Scan 2

228、024 IEEE International Solid-State Circuits Conference2 of 31 Introduction&Motivation System Architecture&Circuit Implementation Signal Processing Measurement Results Summary and ConclusionOutline26.4:A 620pF-Compensated Dual-Mode Capacitance Readout IC for Sub-Display TSP with VRR Scan 2024 IEEE In

229、ternational Solid-State Circuits Conference3 of 31The emergence of new form-factor mobile devices with dual displaysA compact outer screen,and a larger/flexible inner screenIntroduction of Youm Display 1:parasitic capacitance(Cp)&Touch sensitivity Introduction*TSP:Touch Screen PanelITO:Indium Tin Ox

230、ideOCTA:On Cell Touch AMOLED26.4:A 620pF-Compensated Dual-Mode Capacitance Readout IC for Sub-Display TSP with VRR Scan 2024 IEEE International Solid-State Circuits Conference4 of 31 Touch displays prone to malfunctions in various environments Mutual-capacitance:multi-touch,lower CM,misrecognition t

231、o CWTSelf-capacitance:single-touch,higher CS,insensitive to CWTMotivation*CWT:Water CapacitanceTouch Baseline calibration under wet conditions26.4:A 620pF-Compensated Dual-Mode Capacitance Readout IC for Sub-Display TSP with VRR Scan 2024 IEEE International Solid-State Circuits Conference5 of 31Util

232、izing bridge transition in Variable Refresh Rate(VRR)display ScanningMitigating Display Flickering in the 60-to-120Hz DRR transitionIncreased Noise in TSP readouts due to asynchronous Display/Touch drivingInconsistencies in Touch-to-Display latency upon initial finger contact Motivation*DRR:Display

233、Refresh RateTRR:Touch Refresh Rate26.4:A 620pF-Compensated Dual-Mode Capacitance Readout IC for Sub-Display TSP with VRR Scan 2024 IEEE International Solid-State Circuits Conference6 of 31Main Features of This work Compensating for Large Self-Capacitance(CS)Compensating self-capacitance(620 pF)of Y-

234、OCTAUtilizing a compact,current-mode compensation circuit Enhancement of External Noise ImmunityRx-parallel readouts for common-noise suppressionNoise-detection in CM-sensing through orthogonal CS-decoding scheme Two-step synchronization strategies in TSP scansSynchronizing TSP and display driving d

235、uring bridge transitionSynchronizing TSP Excitation and the charge pump clock signals26.4:A 620pF-Compensated Dual-Mode Capacitance Readout IC for Sub-Display TSP with VRR Scan 2024 IEEE International Solid-State Circuits Conference7 of 31Outline Introduction&Motivation System Architecture&Circuit I

236、mplementation Signal Processing Measurement Results Summary and Conclusion26.4:A 620pF-Compensated Dual-Mode Capacitance Readout IC for Sub-Display TSP with VRR Scan 2024 IEEE International Solid-State Circuits Conference8 of 31Supply Voltage Configuration VDDHV(6V)High Voltage TSP Driver Enhanced S

237、NR VDDMV(3V)RX Front-End for CS-compensation&wide AFE DR VDDLV(1.5V)RX Back-End for Rx-parallel differential sensingAFE Area&Power optimizationDual-Mode Capacitance Readout IC(1)*DR:Dynamic Range26.4:A 620pF-Compensated Dual-Mode Capacitance Readout IC for Sub-Display TSP with VRR Scan 2024 IEEE Int

238、ernational Solid-State Circuits Conference9 of 31Dual-Mode Capacitance Readout IC(2)Two-step CS-compensation Current-Mode compensation(CMC)Global compensation of large CS 0-620pF range with step of 20pF Capacitance-Based Compensation(CBC)Fine-tuned&localized compensation 5-bit resolution with step o

239、f 1.875pF26.4:A 620pF-Compensated Dual-Mode Capacitance Readout IC for Sub-Display TSP with VRR Scan 2024 IEEE International Solid-State Circuits Conference10 of 31Dual-Mode Capacitance Readout IC(3)Synchronization approach Vsync-SynchronizationReducing crosstalk between touch/display driving Vcharg

240、e pump-SynchronizationConsistent voltage ripple from VDDHV to TSP driving signal26.4:A 620pF-Compensated Dual-Mode Capacitance Readout IC for Sub-Display TSP with VRR Scan 2024 IEEE International Solid-State Circuits Conference11 of 31Conventional CS-compensation architectureY-OCTA:Increased CSfrom

241、reduced distance(d)between TSP and cathodeConventional approach:Employing substantial integrated CMIMwith VTXR Preventing clipping in the TSP AFE Area efficiency*CA:Charge amplifierMIM:Metal-Insulator-Metal26.4:A 620pF-Compensated Dual-Mode Capacitance Readout IC for Sub-Display TSP with VRR Scan 20

242、24 IEEE International Solid-State Circuits Conference12 of 31One shared CMC core:supplying Qref=CREF x(VDD,MV-VCM,MV)to 25 Rx electrodesSource(QSc,CMC)&Sink(QSk,CMC)charges to handle AC-modulated CSs*DCC:Dual-output Current conveyor(CC)Proposed CS-compensation scheme(CMC)QREF26.4:A 620pF-Compensated

243、 Dual-Mode Capacitance Readout IC for Sub-Display TSP with VRR Scan 2024 IEEE International Solid-State Circuits Conference13 of 31Fine&localized compensation based on MIM Cap 1.875pF LSB CapCMC+CBC compensation resolution=8.46bit within 620pF CSProposed CS-compensation scheme(CBC)26.4:A 620pF-Compe

244、nsated Dual-Mode Capacitance Readout IC for Sub-Display TSP with VRR Scan 2024 IEEE International Solid-State Circuits Conference14 of 31CMC Circuit ImplementationEnhancing dynamic current matching accuracy Rin(suppressing peak current MN1,MN2),MLS(SAT operation isolating MP1&MN3)26.4:A 620pF-Compen

245、sated Dual-Mode Capacitance Readout IC for Sub-Display TSP with VRR Scan 2024 IEEE International Solid-State Circuits Conference15 of 31Compensating for spatial CS-variation in a TSPLocal gain adjustment(GSC,GSK)each TSP electrode:40100%DR of CS,MaxCMC Circuit ImplementationCS,RX CS,RXSpatial CS-var

246、iation 26.4:A 620pF-Compensated Dual-Mode Capacitance Readout IC for Sub-Display TSP with VRR Scan 2024 IEEE International Solid-State Circuits Conference16 of 31Conventional CC with Large CSCurrent conveyor utilizing a Miller-compensated 2-stage op-ampPM degradation:w1st w2nddue to an increased CS,

247、RXof Y-OCTA*CMi:Miller capacitorPM:Phase margin26.4:A 620pF-Compensated Dual-Mode Capacitance Readout IC for Sub-Display TSP with VRR Scan 2024 IEEE International Solid-State Circuits Conference17 of 31Proposed Phase Margin Compensation*CP:Parasitic capacitance “a”CC:Compensation capacitanceLarge CS

248、,RX,Reducing RO1 1stpole&2ndpole splitCCis present for situations where CS,RXare not visible and need to be operated26.4:A 620pF-Compensated Dual-Mode Capacitance Readout IC for Sub-Display TSP with VRR Scan 2024 IEEE International Solid-State Circuits Conference18 of 31Circuit implementationUtilizi

249、ng RFB,pole frequency,and increasing RFB open-loop gainPreventing AFE saturation Gain control,Dual output Differential processing*RFB:Local loop feedback resistor26.4:A 620pF-Compensated Dual-Mode Capacitance Readout IC for Sub-Display TSP with VRR Scan 2024 IEEE International Solid-State Circuits C

250、onference19 of 31Dual-output(Z,Z)CC for Rx-parallel differential processingCRA 2:only responsive to common noise ICNwhile sustaining reference VCM,LVCS&CM-sensing AFE configuration*CRA:Common-mode noise rejection amplifierICN:Coupled display noise current26.4:A 620pF-Compensated Dual-Mode Capacitanc

251、e Readout IC for Sub-Display TSP with VRR Scan 2024 IEEE International Solid-State Circuits Conference20 of 31Outline Introduction&Motivation System Architecture&Circuit Implementation Signal Processing Measurement Results Summary and Conclusion26.4:A 620pF-Compensated Dual-Mode Capacitance Readout

252、IC for Sub-Display TSP with VRR Scan 2024 IEEE International Solid-State Circuits Conference21 of 31CM-scan:6 Tx multi-driving with uniform(=2)orthogonal code densityCS-scan:periodic excitation while executing noise-monitoring function Timing diagram of AFE scan26.4:A 620pF-Compensated Dual-Mode Cap

253、acitance Readout IC for Sub-Display TSP with VRR Scan 2024 IEEE International Solid-State Circuits Conference22 of 31Decoding sequence,HNM only responsitive to external noise NextCSscanning with noise-monitoring26.4:A 620pF-Compensated Dual-Mode Capacitance Readout IC for Sub-Display TSP with VRR Sc

254、an 2024 IEEE International Solid-State Circuits Conference23 of 31Several candidates of decoding sequences from Hadamard matrix HNMAligning the main-lobes of HNMto noisy frequency with different fTX,SsCSscanning with noise-monitoring26.4:A 620pF-Compensated Dual-Mode Capacitance Readout IC for Sub-D

255、isplay TSP with VRR Scan 2024 IEEE International Solid-State Circuits Conference24 of 31Outline Introduction&Motivation System Architecture&Circuit Implementation Signal Processing Measurement Results Summary and Conclusion26.4:A 620pF-Compensated Dual-Mode Capacitance Readout IC for Sub-Display TSP

256、 with VRR Scan 2024 IEEE International Solid-State Circuits Conference25 of 31Measurement Setup0.13m digital&analog back-end,0.35m analog front-end CMOS processShielding analog blocks to prevent EMI with other ICs in mobile deviceCommon analog blockMutual&self-capacitance sensing reconfigurable 1-ch

257、 AFE26.4:A 620pF-Compensated Dual-Mode Capacitance Readout IC for Sub-Display TSP with VRR Scan 2024 IEEE International Solid-State Circuits Conference26 of 31Measurement ResultsMeasured waveforms during Vsync-synchronized 1 TSP frameMulti-driving on 6 Tx electrodes with 6V and 290kHz fTX,MExcitatio

258、nTotal AFE Scan time=4.11ms(0.95ms for CS+3.16ms for CM)26.4:A 620pF-Compensated Dual-Mode Capacitance Readout IC for Sub-Display TSP with VRR Scan 2024 IEEE International Solid-State Circuits Conference27 of 31Measurement ResultsSNR degradation(=30.6dB)for large Rx electrode CSMonitoring a sevenfol

259、d increase in noise power for the HNMdecoding 26.4:A 620pF-Compensated Dual-Mode Capacitance Readout IC for Sub-Display TSP with VRR Scan 2024 IEEE International Solid-State Circuits Conference28 of 31Outline Introduction&Motivation System Architecture&Circuit Implementation Signal Processing Measur

260、ement Results Summary and Conclusion26.4:A 620pF-Compensated Dual-Mode Capacitance Readout IC for Sub-Display TSP with VRR Scan 2024 IEEE International Solid-State Circuits Conference29 of 31Performance SummaryThis workISSCC 23 3ISSCC 17 4ISSCC 18 5Process0.13-m/0.35-m CMOS 1.5V/3.3V/8V process1.1V/

261、3.3V/8V/20V45nm Triple well0.18-m CMOS0.1-m CMOSAFE Area2.81mm2(AFE Only)11.78mm2(A+D+MCU+Memory)27.7mm2(AFE Only)49.7mm2(A+D)1.96mm2(AFE Only)39.2mm2(A+D)5.49mm2(Stylus)AFE Area/Sensor0.086mm20.12mm20.04mm20.39mm2#of electrodesTX:12/15/18,RX:25/22/21 Self:37 ChannelsN/ATX:28,RX:50TX:54,RX:35Capacit

262、ance2-D Mutual and2-D Self Capacitance2-D Self Capacitance2-D Mutual Capacitance2-D Mutual Capacitance26.4:A 620pF-Compensated Dual-Mode Capacitance Readout IC for Sub-Display TSP with VRR Scan 2024 IEEE International Solid-State Circuits Conference30 of 31Performance SummaryThis workISSCC 23 3ISSCC

263、 17 4ISSCC 18 5Readout SchemeCurrent-Conveyor/Common-mode Rejection amplifier/Noise-monitoring schemeCurrent-Conveyor/Noise-antenna reference schemeCurrent-ConveyorCharge amplifierFrame-rateVRR VSync-Synchronization Mutual-C Scan:316Hz Self-C Scan(Tx/Rx):1.05kHz120Hz120Hz133HzSNRSNRM:47.3dB/FingerSN

264、RS,RX:36.1dB 340pF LoadSNRS,TX:30.6dB 530pF Load45.8dB 100pF Load53.3dB/Finger58dB/1-mm penPowerConsumption22.4mW166mW(A+D)6.9mW24mW26.4:A 620pF-Compensated Dual-Mode Capacitance Readout IC for Sub-Display TSP with VRR Scan 2024 IEEE International Solid-State Circuits Conference31 of 31Conclusion De

265、veloped an area-efficient self-capacitance compensation circuit for ultra-thin flexible TSPs for future display technologies.Performed noise-immune AFE signal processing with Rx parallel readout and external noise monitoring scheme Successfully found a compromise to achieve a moderate touch sensitiv

266、ity under heavy TSP panel loading,showing 30.6dB SNR for 530pF CS-sensing Thanks for your attention!26.4:A 620pF-Compensated Dual-Mode Capacitance Readout IC for Sub-Display TSP with VRR Scan 2024 IEEE International Solid-State Circuits Conference32 of 31Please Scan to Rate This Paper26.5:A 977W Cap

267、acitive Touch Sensor with Noise Immune Excitation Source and Direct Lock-In ADC Achieving 25.2pJ/step Energy Efficiency 2024 IEEE International Solid-State Circuits Conference1 of 25A 977W Capacitive Touch Sensor with Noise Immune Excitation Source and Direct Lock-In ADC Achieving 25.2pJ/step Energy

268、 EfficiencyXiangdong Feng1,Zhiyu Wang1,Yekan Chen1,Tianyi Cai1,Yangfan Xuan1,Changgui Yang1,Weixiao Wang1,Yunshan Zhang2,Zhong Tang3,Yuxuan Luo1,Bo Zhao11Zhejiang University,Hangzhou,China 2Microaiot,Hangzhou,China 3Vango Technologies,Hangzhou,China26.5:A 977W Capacitive Touch Sensor with Noise Immu

269、ne Excitation Source and Direct Lock-In ADC Achieving 25.2pJ/step Energy Efficiency 2024 IEEE International Solid-State Circuits Conference2 of 25Outline Introduction and Motivation System Architecture and Proposed techniques Circuit Implementation Measurement Results and Comparison Conclusion26.5:A

270、 977W Capacitive Touch Sensor with Noise Immune Excitation Source and Direct Lock-In ADC Achieving 25.2pJ/step Energy Efficiency 2024 IEEE International Solid-State Circuits Conference3 of 25Introduction and MotivationCapacitive touch systems play a crucial role in user interfaces.26.5:A 977W Capaci

271、tive Touch Sensor with Noise Immune Excitation Source and Direct Lock-In ADC Achieving 25.2pJ/step Energy Efficiency 2024 IEEE International Solid-State Circuits Conference4 of 25Introduction and MotivationVarious sources of noise present significant challenges.DisplayTXiRXiTXi+1RXi+1VCOMLamp NoiseC

272、harger NoiseDisplay NoiseCm C CmCpCpCpCp26.5:A 977W Capacitive Touch Sensor with Noise Immune Excitation Source and Direct Lock-In ADC Achieving 25.2pJ/step Energy Efficiency 2024 IEEE International Solid-State Circuits Conference5 of 25Introduction and Motivation Traditional noise mitigation approa

273、ches lead to large power consumption.They necessitate BPF,mixer,LPF,etc.Too many components!MixerLPFADCADC BPFAFEMUXCA or CC26.5:A 977W Capacitive Touch Sensor with Noise Immune Excitation Source and Direct Lock-In ADC Achieving 25.2pJ/step Energy Efficiency 2024 IEEE International Solid-State Circu

274、its Conference6 of 25Outline Introduction and Motivation System Architecture and Proposed techniques Circuit Implementation Measurement Results and Comparison Conclusion26.5:A 977W Capacitive Touch Sensor with Noise Immune Excitation Source and Direct Lock-In ADC Achieving 25.2pJ/step Energy Efficie

275、ncy 2024 IEEE International Solid-State Circuits Conference7 of 25System Architecture and Proposed techniques0 NoiseConventional Bandpass Filtering at RXProposed Noise-Immune Excitation Source Signal0Freq.SignalNoiseNoiseBandpass Filter Envelopef02f03f04f0Noise fS/2 Traditional approaches implement

276、high-order bandpass filters.A noise-immune excitation source is proposed.26.5:A 977W Capacitive Touch Sensor with Noise Immune Excitation Source and Direct Lock-In ADC Achieving 25.2pJ/step Energy Efficiency 2024 IEEE International Solid-State Circuits Conference8 of 25System Architecture and Propos

277、ed techniquesConventional Lock-in Signal ChainProposed Direct Lock-in ADCSignalSignal00SignalQuant.NoiseSignalMixerLPFIncremental ADCf02f03f04f00Freq.Freq.Freq.Inc.BPFDirect Lock-inADCSignalSignalDoutDout0DCQuant.NoiseACffS/2fS/2 Traditional approaches use the lock-in architecture at the receiver si

278、de.A direct lock-in ADC is proposed.26.5:A 977W Capacitive Touch Sensor with Noise Immune Excitation Source and Direct Lock-In ADC Achieving 25.2pJ/step Energy Efficiency 2024 IEEE International Solid-State Circuits Conference9 of 25System Architecture and Proposed techniques.-QESARDirect Lock-in AD

279、C-QESARNSSAR#i-QESARNSSAR#j1 11 11 10DCQuant.NoiseACfS/2 Transforming AC signal to DC signal then adopting the noise-shaping.NSSAR:Noise-Shaping Successive Approximation ADC26.5:A 977W Capacitive Touch Sensor with Noise Immune Excitation Source and Direct Lock-In ADC Achieving 25.2pJ/step Energy Eff

280、iciency 2024 IEEE International Solid-State Circuits Conference10 of 25System Architecture and Proposed techniques14bit Look-Up TableBandpassDelta-SigmaModulator1616FPCBDriverTXRX14-to-2 MUX.ChargeAmplifierDirect Lock-inADCCLKTSP System Architecture 16 TX.Four frequency with four phases per frequenc

281、y.28 RX.Four groups of readout modules.26.5:A 977W Capacitive Touch Sensor with Noise Immune Excitation Source and Direct Lock-In ADC Achieving 25.2pJ/step Energy Efficiency 2024 IEEE International Solid-State Circuits Conference11 of 25System Architecture and Proposed techniquesFour phase excitatio

282、n and demodulation.The 0phase and 90phase are arranged far away.The demodulation of 4 phase signal is the same as QAM4.TX 4f0 0TX 4f0 180TX 3f0 0TX 3f0 180TX 2f0 0TX 2f0 180TX f0 0TX f0 180TX 4f0 90TX 4f0 270TX 3f0 90TX 3f0 270TX 2f0 90TX 2f0 270TX f0 90TX f0 27026.5:A 977W Capacitive Touch Sensor w

283、ith Noise Immune Excitation Source and Direct Lock-In ADC Achieving 25.2pJ/step Energy Efficiency 2024 IEEE International Solid-State Circuits Conference12 of 25Outline Introduction and Motivation System Architecture and Proposed techniques Circuit Implementation Measurement Results and Comparison C

284、onclusion26.5:A 977W Capacitive Touch Sensor with Noise Immune Excitation Source and Direct Lock-In ADC Achieving 25.2pJ/step Energy Efficiency 2024 IEEE International Solid-State Circuits Conference13 of 25Circuit Implementation/23/20Step=/6/23/20Step=/2/23/20Step=/3Phase Accumulator/23/20Step=2/30

285、2 02 02 02 Amp.Map(14b LUT)2nd Order Bandpass Modulator for Excitation211 11 1KFibonacci Linear-Feedback Shift Register15b PRBS000100000000000Dithering164444 Noise-immune excitation source circuit.A single 14-bit look-up table is employed.Different phase accumulation steps for the four frequencies.2

286、6.5:A 977W Capacitive Touch Sensor with Noise Immune Excitation Source and Direct Lock-In ADC Achieving 25.2pJ/step Energy Efficiency 2024 IEEE International Solid-State Circuits Conference14 of 25Circuit Implementation.CC32C.16CDAC DriverSCC32C.16CDAC DriverVINPVINNFIACap BankCap BankCOMPValid Asyn

287、chronousSARLogicLogicLogicLogicLogicCLKcS000111CLKc111111111N1N1N1N111NADC circuit.FIA:Floating Inverter Amplifier.26.5:A 977W Capacitive Touch Sensor with Noise Immune Excitation Source and Direct Lock-In ADC Achieving 25.2pJ/step Energy Efficiency 2024 IEEE International Solid-State Circuits Confe

288、rence15 of 25Circuit ImplementationChopping consideration.Our ADC transforms the AC signal to DC signal,thus needs chopping.For conventional work,chopping frequency fC=fS/2.DA:Dynamic Amplifier0DCQuant.NoiseACfS/2Tang,JSSC,202026.5:A 977W Capacitive Touch Sensor with Noise Immune Excitation Source a

289、nd Direct Lock-In ADC Achieving 25.2pJ/step Energy Efficiency 2024 IEEE International Solid-State Circuits Conference16 of 25Circuit ImplementationChopping consideration.For this work,chopping frequency fC=fS/24.QESARNSSAR#I1 1fS,I=fS/12fC=fS/24 QESARNSSAR#J1 1fS,J=fS/12fC=fS/24-QESAR1 1fSfC=fS/2426

290、.5:A 977W Capacitive Touch Sensor with Noise Immune Excitation Source and Direct Lock-In ADC Achieving 25.2pJ/step Energy Efficiency 2024 IEEE International Solid-State Circuits Conference17 of 25Outline Introduction and Motivation System Architecture and Proposed techniques Circuit Implementation M

291、easurement Results and Comparison Conclusion26.5:A 977W Capacitive Touch Sensor with Noise Immune Excitation Source and Direct Lock-In ADC Achieving 25.2pJ/step Energy Efficiency 2024 IEEE International Solid-State Circuits Conference18 of 25Measurement Results and Comparison28 Channel RX Sensing Bl

292、ocks16 Ch.TX1.755 mm1.45 mm1.29mm0.96mm0.14mm0.5mmRX Group 1RX Group 2RX Group 3RX Group 426.5:A 977W Capacitive Touch Sensor with Noise Immune Excitation Source and Direct Lock-In ADC Achieving 25.2pJ/step Energy Efficiency 2024 IEEE International Solid-State Circuits Conference19 of 25Measurement

293、Results and ComparisonTouch Screen Panel and Display PanelChipFPGA for Touch DisplayTest PCB Measurement setup26.5:A 977W Capacitive Touch Sensor with Noise Immune Excitation Source and Direct Lock-In ADC Achieving 25.2pJ/step Energy Efficiency 2024 IEEE International Solid-State Circuits Conference

294、20 of 25Measurement Results and ComparisonChopping Effectfs=1.72 MHz32760 points OSR=1.5fs=1.72 MHz32760 points fs=1.72 MHz32760 points fs=1.72 MHz32760 points 0.860.860.860.860Excitation Signal at f0Excitation Signal at 4f0ADC Spectrum with Zero InputADC Spectrum with Full Scale 4f0 Signal26.5:A 97

295、7W Capacitive Touch Sensor with Noise Immune Excitation Source and Direct Lock-In ADC Achieving 25.2pJ/step Energy Efficiency 2024 IEEE International Solid-State Circuits Conference21 of 25Measurement Results and ComparisonStylus Touch RMS Value 1.3800DFT DataDFT DataFinger Touch RMS Value 1.49Five-

296、Point Finger TouchStylus Touch26.5:A 977W Capacitive Touch Sensor with Noise Immune Excitation Source and Direct Lock-In ADC Achieving 25.2pJ/step Energy Efficiency 2024 IEEE International Solid-State Circuits Conference22 of 25Measurement Results and Comparison(a)Mean value of 10 chips.(b)FoM=Power

297、/(2(SNR-1.76)/6.02#of node Frame rate).This WorkThis Work1 ISSCC 20231 ISSCC 20232 VLSI 20202 VLSI 20204 4 JSSC 2019JSSC 20196 6 JSSC 2018JSSC 2018Supply1.2/1.0V1.5/3V 3.3V2.73.3V1.8/3.3VProcess(nm)65130180180180Core area(mm2)1.3110.43.04361.96TSP size(inch)71.266.712.210.1Driving Voltage(V)293.33.3

298、3.3#of electrodes16 288 88 17366450 28Frame rate(Hz)12012012085385120OSR1.5NANA6500300SNR(Finger,dB)58.9(a)6337.55453.5SNR(Stylus,dB)41.3NA23.54141.7Power(mW)0.9778.11294.56.9FoM(b)(pJ/step)25.2913.7120059811026.5:A 977W Capacitive Touch Sensor with Noise Immune Excitation Source and Direct Lock-In

299、ADC Achieving 25.2pJ/step Energy Efficiency 2024 IEEE International Solid-State Circuits Conference23 of 25Outline Introduction and Motivation System Architecture and Proposed techniques Circuit Implementation Measurement Results and Comparison Conclusion26.5:A 977W Capacitive Touch Sensor with Nois

300、e Immune Excitation Source and Direct Lock-In ADC Achieving 25.2pJ/step Energy Efficiency 2024 IEEE International Solid-State Circuits Conference24 of 25Conclusion Two technique:noise-immune excitation source and direct lock-in ADC.Benefit:the chip achieves an energy efficiency of 25.2 pJ/step.26.5:

301、A 977W Capacitive Touch Sensor with Noise Immune Excitation Source and Direct Lock-In ADC Achieving 25.2pJ/step Energy Efficiency 2024 IEEE International Solid-State Circuits Conference25 of 25Thank YouQ&A26.5:A 977W Capacitive Touch Sensor with Noise Immune Excitation Source and Direct Lock-In ADC Achieving 25.2pJ/step Energy Efficiency 2024 IEEE International Solid-State Circuits Conference26 of 25Please Scan to Rate This Paper