SESSION 31 - Power Converter Techniques.pdf

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1、ISSCC 2024SESSION 31Power Converter TechniquesAn 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF ApplicationsChangjin Chen,Ximing Li,Rui Hu,Lin ChengPresented by Jing

2、yi YuanUniversity of Science and Technology of China,Hefei,China 2024 IEEEInternational Solid-State Circuits Conference1 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth

3、5G New Radio RF ApplicationsOutline Introduction Proposed Supply Modulator for 5G NR Measurement Results and Comparison Conclusion Class-G LA with Smooth Transition Technique Circuit Implementation of the Class-G LA SIDIDO Converter 2024 IEEEInternational Solid-State Circuits Conference2 of 4231.1:A

4、n 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF ApplicationsOutline Introduction Proposed Supply Modulator for 5G NR Measurement Results and Comparison Conclusion C

5、lass-G LA with Smooth Transition Technique Circuit Implementation of the Class-G LA SIDIDO Converter 2024 IEEEInternational Solid-State Circuits Conference3 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Ou

6、tput Converter for 200MHz Bandwidth 5G New Radio RF ApplicationsMotivation:Envelope Tracking(ET)2024 IEEEInternational Solid-State Circuits Conference4 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output

7、Converter for 200MHz Bandwidth 5G New Radio RF Applications Envelope tracking improves efficiency of RF-PABasebandSupplyModulatorUp-ConverterPowerAmplifierDiff.EnvelopeI&QRFSignalTo AntennaSMOUT(VDD_PA)Fixed SupplyReduced Power LossRFOUTET Supply Modulator(SM)Structure 2024 IEEEInternational Solid-S

8、tate Circuits Conference5 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF Applications Switching amplifier(SA)with high efficiency for low frequency DC c

9、urrent Linear amplifier(LA)with high BW for output voltage regulation&high frequency AC current Buck-boost for supply of LABuck-BoostVDD_PAClass-ABLinear Amplifier(LA)PASwitching Amplifier(SA)RFinRFoutISAILAIPAVDD_LAVOUT_LAENVINVBATVDD_LAVAC Sourcing Currentfrom LASinking Currentfrom LAILA0mAISAIPAB

10、uck-BoostVDD_PAClass-ABLinear Amplifier(LA)PASwitching Amplifier(SA)RFinRFoutISAILAIPAVDD_LAVOUT_LAENVINVBATVDD_LAVAC IsourcingIsinkingIbiasPower Loss in ETSM System 2024 IEEEInternational Solid-State Circuits Conference6 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a

11、Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF Applications The SA and buck-boost are efficient when switching at several MHz The LA is inefficient due to V-I loss:bias loss,sinking/sourcing loss 0mASourcingCurrentSinkingCurrentVD

12、D_LAGNDILA voltage drop across output stage(source)ILAILA voltage drop across output stage(sink)100MHz 1V3V 5 200MHz 1V5V 5 200ns100nsILAw/200pFw/o 200pFChallenges in SM for 5G NR 2024 IEEEInternational Solid-State Circuits Conference7 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modu

13、lator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF ApplicationsSupply Modulator DesignVDD_PA.minVDD_PA.max1V5VPA Model5/200pFBandwidth200MHzVDD_LA4.5VVAC0.8VILAPASupplyModulatorRFinVDD_PALarge CPAVDD_PAfreqWide Bandwidth

14、High VoltageVDD_PAPrevious Techniques 2024 IEEEInternational Solid-State Circuits Conference8 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF Application

15、s LA techniques can only reduce bias current How to reduce sinking current and sourcing current?P.Mahmoudidaryan,ISSCC19 Wide bandwidth and high slew-rate LA Slew-rate enhancement GmboostInput StageMiddleGain StageSREENVINClass-AB StageVOUT_LAY.Jing,TMTT17 Adaptive BiasingMiddleGain StageClass-AB St

16、ageVOUT_LAVIPVINGm BoostPrevious Techniques 2024 IEEEInternational Solid-State Circuits Conference9 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF Appli

17、cations High switching frequency of power devices Significant switching loss Controller delay Mismatch between ISAand IPA ILAincreasesJ.-S.Paek,ISSCC19High-speed SA for Isourcingand Isinkingreduction Hysteresis-controlled 3-level SA Fast buck+Slow buckP.Mahmoudidaryan,ISSCC19 Controllerand DriverENV

18、INLA2 1 ILAIFBKISBKIPAControllerand DriverFast buck(FBK)Slow buck(SBK)CACIFBK+ILADriversISAVCFHysteresis ControllerENVINVCFILAHysteresis ControlSystem3-LevelConverterPrevious Techniques 2024 IEEEInternational Solid-State Circuits Conference10 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supp

19、ly Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF Applications Reduced Isinking High voltage stress of S1 and S2 High switching loss Discontinuous Irecycleat VDD_PA Large output ripple C.-S.Huang,JSSC22Energy rec

20、ycle for IsinkingreductionENVINLA IrecycleISACACIsinkingIPAPARFinRFoutVDD_PAVDD_PAVNEGILALAVDD_PAIrecycleLNEGCNEG1:2 SCSAISAMicro BBS1S2IPAIsinking=ISA IPAIrecycleOutline Introduction Proposed Supply Modulator for 5G NR Measurement Results and Comparison Conclusion Class-G LA with Smooth Transition

21、Technique Circuit Implementation of the Class-G LA SIDIDO Converter 2024 IEEEInternational Solid-State Circuits Conference11 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwi

22、dth 5G New Radio RF ApplicationsSIDIDOVDD_PAPARFinRFoutVBATISAILAVENV_NIPAVOUT_LAInputOutputVDDLVDDHVSSLSwitching Amplifier(SA)VDDHVDDLVSSLVENV_PClass-GLinear AmplifierVACProposed SM for 5G NR 2024 IEEEInternational Solid-State Circuits Conference12 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracki

23、ng Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF Applications0mASourcingCurrentVDDHGNDVDDLVSSLReduced ILA voltage dropEffective LA supplySinkingCurrentILA High Efficiency Class-G Linear Amplifier(LA):Addi

24、tional power rails VDDL,VSSLfor low amplitude envelopeReduced voltage drop of ILAand Ibias Better efficiencySIDIDOVDD_PAPARFinRFoutVBATISAILAVENV_NIPAVOUT_LAInputOutputVDDLVDDHVSSLSwitching Amplifier(SA)VDDHVDDLVSSLVENV_PClass-GLinear AmplifierVAC0mASourcingCurrentVDDHGNDVDDLVSSLReduced ILA voltage

25、dropEffective LA supplySinkingCurrentILAProposed SM for 5G NR 2024 IEEEInternational Solid-State Circuits Conference13 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G

26、 New Radio RF Applications Issue(1/2):The need for multiple DC supplies VSSL,VDDLand VDDHare supposed to be regulated Solution:Single-Inductor Dual-Input-Dual-Output Converter(SIDIDO)SIDIDOVDD_PAClass-GLinear AmplifierPARFinRFoutVBATVENV_NVOUT_LAInputOutputVDDLVDDHVSSLSwitching Amplifier(SA)VDDHVDDL

27、VSSLVENV_PVACProposed SM for 5G NR 2024 IEEEInternational Solid-State Circuits Conference14 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF Applications

28、Issue(2/2):Distortion due to the fast class-G switching operation Solution:High-speed smooth transition technique for class-G LAffnSM output(VDD_PA)ffc+fnfcPA output（RFout）Noisefc fnOutline Introduction Proposed Supply Modulator for 5G NR Measurement Results and Comparison Conclusion Class-G LA with

29、 Smooth Transition Technique Circuit Implementation of the Class-G LA SIDIDO Converter 2024 IEEEInternational Solid-State Circuits Conference15 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converte

30、r for 200MHz Bandwidth 5G New Radio RF ApplicationsClass-G Topologies:Parallel VS.Serial 2024 IEEEInternational Solid-State Circuits Conference16 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Conver

31、ter for 200MHz Bandwidth 5G New Radio RF ApplicationsParallel TopologySerial TopologyOnly one device voltage dropReverse current Additional OTA and switching circuitsDistortion due to supply transitionDiode voltage dropNo reverse currentSimple switching circuitsSupply switching noiseVSSHVDDHVDDLVSSL

32、VOUT_LAReverse currentVDDHVDDLVSSLVSSHVOUT_LAA.Lollio,JSSC10VDDHVDDLVSSLVSSHVOUT_LAClass-G Topologies:Parallel VS.Serial 2024 IEEEInternational Solid-State Circuits Conference17 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Induct

33、or Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF ApplicationsParallel TopologySerial TopologyOnly one device voltage dropReverse current Additional OTA and switching circuitsDistortion due to supply transitionDiode voltage dropNo reverse currentSimple switching circuitsSupply

34、 switching noiseVSSHVDDHVDDLVSSLVOUT_LA The serial topology is more feasible for 200MHz high bandwidth operation How to solve the supply switching noise issue?Reverse currentA.Lollio,JSSC10VSSLVDDLVDDHVSSHVDD_ABVSS_ABVENV_PVENV_NAB-LANLDOPLDOVOUT_LAVDD_PAEAPEANOTAABBufferIBIAS_PIBIAS_ABIBIAS_NDPDNMP

35、MNLA with Smooth Transition Technique 2024 IEEEInternational Solid-State Circuits Conference18 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF Applicatio

36、ns A class-AB LA,two supply-modulated LDOs,and two power diodes Maintain a continuous and smooth power rail for the inner AB-LAVoltage(V)VOUT_LAVSSHVDDHVDDLVSSLVDD_ABVSS_ABPLDO ONNLDO ONVOS_PVOS_NVSSLVDDLVDDHVSSHVDD_ABVSS_ABVENV_PVENV_NAB-LANLDOPLDOVOUT_LAVDD_PAEAPEANOTAABBufferIBIAS_PIBIAS_ABIBIAS_

37、NDPDNMPMNR1R1R2R2R1R1R2R2R1R1R2R2Voltage(V)VOUT_LAVSSHVDDHVDDLVSSLVDD_ABVSS_ABVOS_PVOS_NPLDO ONOperation of Class-G LA 2024 IEEEInternational Solid-State Circuits Conference19 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor

38、 Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF Applications VDDHfor souring current High positive input PLDO regulates VDD_ABto VOUT_LA+VOS_P VDD_ABhigher than VDDLVDP DPoffVSSLVDDLVDDHVSSHVDD_ABVSS_ABVENV_PVENV_NAB-LANLDOPLDOVOUT_LAVDD_PAEAPEANOTAABBufferIBIAS_PIBIAS_ABIBIAS

39、_NDPDNMPMNVoltage(V)VOUT_LAVSSHVDDHVDDLVSSLVDD_ABVSS_ABVOS_PVOS_NDP ONOperation of Class-G LA 2024 IEEEInternational Solid-State Circuits Conference20 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output C

40、onverter for 200MHz Bandwidth 5G New Radio RF Applications VDDLfor souring current Low positive input EAPturns down MP VDD_AB drops DPclamps VDD_AB to VDDLVDP EAPfully turns off MPVoltage(V)VOUT_LAVSSHVDDHVDDLVSSLVDD_ABVSS_ABVOS_PVOS_NNLDO ON VSSH(GND)for sinking current High negative input NLDO reg

41、ulates VSS_ABto VOUT_LA VOS_N VSS_ABlower than VSSL+VDN DNoffVSSLVDDLVDDHVSSHVDD_ABVSS_ABVENV_PVENV_NAB-LANLDOPLDOVOUT_LAVDD_PAEAPEANOTAABBufferIBIAS_PIBIAS_ABIBIAS_NDPDNMPMNOperation of Class-G LA 2024 IEEEInternational Solid-State Circuits Conference21 of 4231.1:An 83.4%-Peak-Efficiency Envelope-T

42、racking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF ApplicationsVoltage(V)VOUT_LAVSSHVDDHVDDLVSSLVDD_ABVSS_ABVOS_PVOS_NDN ONVSSLVDDLVDDHVSSHVDD_ABVSS_ABVENV_PVENV_NAB-LANLDOPLDOVOUT_LAVDD_PAEAPEANOTAABB

43、ufferIBIAS_PIBIAS_ABIBIAS_NDPDNMPMNOperation of Class-G LA 2024 IEEEInternational Solid-State Circuits Conference22 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G Ne

44、w Radio RF Applications VSSLfor sinking current Low negative input EANturns down MN VSS_ABrises DNclamps VSS_AB to VSSL+VDN EANfully turns off MNOptimal Value of Lower Power Rails 2024 IEEEInternational Solid-State Circuits Conference23 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Mod

45、ulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF ApplicationsVDDH VDDL or VSSLIDDL or ISSLIDDL(VDDH VDDL)or ISSLVSSLSweet spot Optimal VDDL(VSSL)for the maximal product of current and reduced voltage drop The sweet sp

46、ots of VDDL&VSSLvary with output powerVDDLVSSLVDDHVOUT_LAHigh output powerLow output powerVSSHOutline Introduction Proposed Supply Modulator for 5G NR Measurement Results and Comparison Conclusion Class-G LA with Smooth Transition Technique Circuit Implementation of the Class-G LA SIDIDO Converter 2

47、024 IEEEInternational Solid-State Circuits Conference24 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF Applications1:11:5(VSSH+1)VSSHVDDHITAIL_NLDO=1.2m

48、AVPVNMNVSS_AB1:51:1VDDH(VDDH-1)ITAIL_PLDO=1.2mAVPVNMPCore 1VIO 2.5VIO 3.3VVDD_ABCircuit Implementation of the Class-G LA 2024 IEEEInternational Solid-State Circuits Conference25 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Induct

49、or Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF Applications Low-Vthcore devices for MPand MN Small Cg&low dropout voltage VDDH-1V and VSSH+1V power rails by on-chip LDOs Fast&robust operationPLDONLDO1:11:5(VSSH+1)VSSHVDDHITAIL_NLDO=1.2mAVPVNMNVSS_AB1:51:1VDDH(VDDH-1)ITAIL_P

50、LDO=1.2mAVPVNMPCore 1VIO 2.5VIO 3.3VVDD_ABCircuit Implementation of the Class-G LA 2024 IEEEInternational Solid-State Circuits Conference26 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter fo

51、r 200MHz Bandwidth 5G New Radio RF Applications Consumes only small tail currents when VDDLor VSSLis selectedPLDONLDOCircuit Implementation of the Class-G LA 2024 IEEEInternational Solid-State Circuits Conference27 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G

52、 Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF Applications AB buffer stacks two 1V devices and one 2.5V device for maximum 4.5V supply Low-Vth1V NMOS transistors for diodes1.1-1.00.70.3-0.1-0.6-0.20.2-3.7mA-1V1.04A0.3VVoltage(V)Current(

53、A)VDD_ABVSS_ABVDDL3.7GHz4.2GHz5:1IQ_AB_Buffer20mA1:10ITAIL_AB=1.2mAVPVNAB-LACore 1VIO 2.5VIO 3.3VDiodeOutline Introduction Proposed Supply Modulator for 5G NR Measurement Results and Comparison Conclusion Class-G LA with Smooth Transition Technique Circuit Implementation of the Class-G LA SIDIDO Con

54、verter 2024 IEEEInternational Solid-State Circuits Conference28 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF ApplicationsSIDIDO Converter Architecture

55、 2024 IEEEInternational Solid-State Circuits Conference29 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF ApplicationsLVBATVSSLVDDLVDDHCurrentSense PWMCo

56、ntrolLogicVFB_VDDHEAVREF_VDDHDeadtime&Level shifterCMP1CMP2S1DutyS1S2S3S4S5S2S3S4S5VFB_VSSLVREF_VSSLVFB_VDDLVREF_VDDLVSW1VSW2 VBAT,VSSLare inputs,VDDL,VDDHare outputs Based on boost converter for 4.5V VDDHSIDIDOVDD_PAPARFinRFoutVBATISAILAVENV_NIPAVOUT_LAInputOutputVDDLVDDHVSSLSwitching Amplifier(SA)

57、VDDHVDDLVSSLVENV_PClass-GLinear AmplifierVACILtDVSSLVBATVDDLVDDHTS1S2S3S4S5CMP1DutyCMP2D1D2D3D4LVBATVSSLVDDLVDDHS2S1S3S4S5LVBATVSSLVDDLVDDHS2S1S3S4S5LVBATVSSLVDDLVDDHS2S1S3S4S5LVBATVSSLVDDLVDDHS2S1S3S4S51234Operation of SIDIDO Converter 2024 IEEEInternational Solid-State Circuits Conference30 of 423

58、1.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF Applications 1is active if VSSLis higher than VREF_VSSL L is energized,VSSLis dischargedILtDVSSLVBATVDDLVDDHTS1

59、S2S3S4S5CMP1DutyCMP2D1D2D3D4LVBATVSSLVDDLVDDHS2S1S3S4S5LVBATVSSLVDDLVDDHS2S1S3S4S5LVBATVSSLVDDLVDDHS2S1S3S4S5LVBATVSSLVDDLVDDHS2S1S3S4S51234Operation of SIDIDO Converter 2024 IEEEInternational Solid-State Circuits Conference31 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Usi

60、ng a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF Applications 2is active when VSSLdrops to VREF_VSSL L is further energized by VBAT D=D1+D2ILtDVSSLVBATVDDLVDDHTS1S2S3S4S5CMP1DutyCMP2D1D2D3D4LVBATVSSLVDDLVDDHS2S1S3S4S5LVBATVSSLV

61、DDLVDDHS2S1S3S4S5LVBATVSSLVDDLVDDHS2S1S3S4S5LVBATVSSLVDDLVDDHS2S1S3S4S51234Operation of SIDIDO Converter 2024 IEEEInternational Solid-State Circuits Conference32 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Du

62、al-Output Converter for 200MHz Bandwidth 5G New Radio RF Applications 3is active if VDDLis lower than VREF_VDDL L is de-energized,VDDLis chargedILtDVSSLVBATVDDLVDDHTS1S2S3S4S5CMP1DutyCMP2D1D2D3D4LVBATVSSLVDDLVDDHS2S1S3S4S5LVBATVSSLVDDLVDDHS2S1S3S4S5LVBATVSSLVDDLVDDHS2S1S3S4S5LVBATVSSLVDDLVDDHS2S1S3S

63、4S51234Operation of SIDIDO Converter 2024 IEEEInternational Solid-State Circuits Conference33 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF Application

64、s 4is active when VDDLreaches VREF_VDDL L is de-energized,VDDHis chargedOutline Introduction Proposed Supply Modulator for 5G NR Measurement Results and Comparison Conclusion Class-G LA with Smooth Transition Technique Circuit Implementation of the Class-G LA SIDIDO Converter 2024 IEEEInternational

65、Solid-State Circuits Conference34 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF ApplicationsChip Micrographs 2024 IEEEInternational Solid-State Circuit

66、s Conference35 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF Applications 65nm CMOS process Die area:Off-chip:CVDDH4.7FCVDDL2.2FCVSSL2.2FCAC4.7FLSIDIDO

67、8.2HLSA4.7HLA2.52mm2SA1.04mm2SIDIDO2.18mm220ns600mV600mV20ns20ns600mV600mV20nsVOUT_LAVENVVENV_PVENV_NVOUT_LAVENVVENV_PVENV_NVDD_ABVSS_ABMeasurement Waveforms 2024 IEEEInternational Solid-State Circuits Conference36 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G

68、 Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF Applications Output follows input Both PLDO and NLDO well regulate VDD_AB and VSS_ABClass-G LA Tracking NR 200M EnvelopeMeasurement Waveforms 2024 IEEEInternational Solid-State Circuits Conf

69、erence37 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF Applications SIDIDO regulates outputs with small ripple VDD_PAswings from 1V to 5V;VDDL/VSSLprov

70、ide ILAwith reduced voltage dropSIDIDO WaveformsInductor currentIL100mAVSSL 1V,50mA50mV500ns50mVVDDL 3.5V,50mA VDDH 4.5V,120mA50mV1VETSM Waveforms500nsVSW2_SIDIDOVSW_SA4V2V2VVSW1_SIDIDO1VVDD_PAMeasured Efficiency 2024 IEEEInternational Solid-State Circuits Conference38 of 4231.1:An 83.4%-Peak-Effici

71、ency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF ApplicationsEfficiency(%)ETSM output power(W)0.81.01.21.41.61.82.02.22.42.60.600.650.700.750.800.854.9%2.3%83.4%Class-G LA with SIDIDO

72、Converter Class-AB LA with Boost Converter 83.4%peak efficiency at the maximum output power of 2.4W 2.3%4.9%improvement is achieved with proposed class-G LA and SIDIDO converterEfficiency with 5/200pF Load Tracking NR 200M EnvelopeComparison with Prior ETSM 2024 IEEEInternational Solid-State Circuit

73、s Conference39 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF Applications*Estimated from graph.Publication This Work 2 ISSCC21 3 ISSCC19 4 ISSCC19 5 JS

74、SC22 Process 65nm 90nm 90nm 65nm 90nm Power Class PC2 PC2 PC2 NA PC2 PA Model 5/200pF 3.3 3.2 4.7 5/100pF VDD_PA AC Swing*4V 4V NA 2V 2V Max.ET BW 200MHz 130MHz 100MHz 80MHz 150MHz EfficiencyMax.Bw 83.4%84.1%77%91%89.7%Outline Introduction Proposed Supply Modulator for 5G NR Measurement Results and

75、Comparison Conclusion Class-G LA with Smooth Transition Technique Circuit Implementation of the Class-G LA SIDIDO Converter 2024 IEEEInternational Solid-State Circuits Conference40 of 4231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Ind

76、uctor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF Applications 2024 IEEEInternational Solid-State Circuits Conference41 of 42Conclusions A high efficiency,wideband hybrid ET supply modulator for 5G NR A class-G LA,an SIDIDO converter and an SA Reduced voltage drop by class-

77、G LA,improved efficiency The Class-G linear amplifier achieves fast and smooth transition between high and low power rails for low distortion and high linearity The SIDIDO converter generates power rails of LA efficiently and cost-effectively 83.4%peak efficiency at 200MHz ET BW,200pF large load cap

78、acitor and 4V high AC swing31.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF ApplicationsThank you!2024 IEEEInternational Solid-State Circuits Conference42 of 4

79、231.1:An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF ApplicationsPlease Scan to Rate Please Scan to Rate This PaperThis Paper31.2:A Ripple-Less Buck Converter wit

80、h Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference1 of 48Yi-Hsiang Kao1,Jie-Lin Wu1,Wei-Cheng Huang1,Hui-HsuanChang1,Hsing-Yen Tsai1,Rong-Bin Guo1,Ke-Horng Chen1,Kuo-Lin Zeng1,2,Ying-Hsi Lin3,Shian-Ru Lin3,Tsung-Yen Tsai3A Ripple-Less Buck Co

81、nverter with Sub-21.94dB EVM for 5G Low Earth Orbit Application1National Yang Ming Chiao Tung University,Hsinchu,Taiwan2Chip-GaN Power Semiconductor,Hsinchu,Taiwan3Realtek Semiconductor,Hsinchu,Taiwan31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE

82、International Solid-State Circuits Conference2 of 48OutlineIntroductionProposed Ripple-Less Buck Converter with Inverted AC Current Replica Circuit for 5G NR LEO ApplicationMeasurement ResultsConclusions31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IE

83、EE International Solid-State Circuits Conference3 of 48OutlineIntroductionProposed Ripple-Less Buck Converter with Inverted AC Current Replica Circuit for 5G NR LEO ApplicationMeasurement ResultsConclusions31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024

84、 IEEE International Solid-State Circuits Conference4 of 48The development of rocket recovery technologyThe rise of non-terrestrial networks and 5G new radio(5G NR)Low earth orbit(LEO)as the next most favored space applicationAccess to the Internet in distant oceans or mountainous areasIntroduction31

85、.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference5 of 48IntroductionPDSCH modulation scheme Required EVM(dB)QPSK64QAM16QAM-15.14dB-21.94dB-18.06dB5G NR LEO standardIQReceived SymbolIdeal SymbolError VectorN

86、otified by European Telecommunications Standards Institute(ETSI)EVM 12.5%in 16QAM,8%in 64QAMEVM(dB)=20logEVM(%)10031.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference6 of 48Requirements for 5G NR LEO RF circ

87、uit power supplyHigh efficiencyLow conversion ratio(CR)Stable power supplySmall sizeIntroduction6Power System of LEO21.6-33VRFCircuitBattery Control RegulatorSolar PanelsLow-CRConverter1V31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International

88、 Solid-State Circuits Conference7 of 48Conventional Step-Down ConverterDisadvantagesLow duty cycle Efficiency or noiseRipple noise on VOUTDisturb RF circuitLarge voltage stressEfficiency and sizeLarge conduction loss EfficiencyLCOUTRLOADVOUTVINRESRS2S11VConventionalBuckRFCircuit21.6-33VLL Ripple Noi

89、seLL D=3%-4.63%31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference8 of 48LCOUTRLOADVOUTVINRESRS2S1Conventional Step-Down ConverterDisadvantagesLow duty cycle Efficiency or noiseRipple noise on VOUTDisturb R

90、F circuitLarge voltage stressEfficiency and sizeLarge conduction loss EfficiencyLarge Voltage Stress(VIN)ILIL_DC=ILOADtLL Large Conduction LossP=I2R31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference9 of 48

91、Three-Level Step-Down ConverterDisadvantagesRipple noise on VOUTDisturb RF circuitLarge conduction loss Efficiency1VThree-Level Step-Down ConverterRFCircuit21.6-33VLL Ripple NoiseJJ D=6%-9.26%21C1 charging,L magnetizing3C1 discharging,L magnetizingL demagnetizingOperation sequence at low CR:1323VINV

92、SWS1HS2HS1LS2LC1LCOUTIloadVOUTVINVSWS1HS2HS1LS2LC1LCOUTIloadVOUTVINVSWS1HS2HS1LS2LC1LCOUTIloadVOUT31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference10 of 48Three-Level Step-Down ConverterDisadvantagesRippl

93、e noise on VOUTDisturb RF circuitLarge conduction loss Efficiency21C1 charging,L magnetizing3C1 discharging,L magnetizingL demagnetizingOperation sequence at low CR:1323VINVSWS1HS2HS1LS2LC1LCOUTIloadVOUTVINVSWS1HS2HS1LS2LC1LCOUTIloadVOUTVINVSWS1HS2HS1LS2LC1LCOUTIloadVOUTILIL_DC=ILOADtVIN/2S1HS2HLL L

94、arge Conduction LossP=I2RMaximum Voltage StressS1LS2LVIN/2VIN/2VIN/2JJ Reduced Voltage Stress31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference11 of 48Dual-Path Series-Capacitor ConverterDisadvantagesRippl

95、e noise on VOUTDisturb RF circuitLarge switching voltage spikeDisturb RF circuitC1H,C2H charging,C1L,C2L dischargingL magnetizing1C1LLVINS1HS2HS3HS4HS5HS6HS1LC1HC2HC2LCOUTIloadVOUTESL2C1H,C2H discharging,C1L,C2L chargingL demagnetizingC1LLVINS1HS2HS3HS4HS5HS6HS1LC1HC2HC2LL pathC pathICFLYCOUTIloadVO

96、UTESLS2LS2L1VDual-Path Series-Capacitor ConverterRFCircuit21.6-33VLL Ripple NoiseJJ D=9.68%-15.31%LL Switching Spike31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference12 of 48Dual-Path Series-Capacitor Conv

97、erterDisadvantagesRipple noise on VOUTDisturb RF circuitLarge switching voltage spikeDisturb RF circuitC1H,C2H charging,C1L,C2L dischargingL magnetizing1C1LLVINS1HS2HS3HS4HS5HS6HS1LC1HC2HC2LCOUTIloadVOUTESL2C1H,C2H discharging,C1L,C2L chargingL demagnetizingC1LLVINS1HS2HS3HS4HS5HS6HS1LC1HC2HC2LL pat

98、hC pathICFLYCOUTIloadVOUTESLS2LS2LVIN/3.6S1HS2HMaximum Voltage StressS3HS4HVIN/2.77VIN/2.77VIN/2.77VIN/2.77S5HS6HMaximum Voltage StressS1LS2LVOUTVIN/3.6VOUTJJ Reduced Voltage Stress31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid

99、-State Circuits Conference13 of 48Dual-Path Series-Capacitor ConverterDisadvantagesRipple noise on VOUTDisturb RF circuitLarge switching voltage spikeDisturb RF circuitC1H,C2H charging,C1L,C2L dischargingL magnetizing1C1LLVINS1HS2HS3HS4HS5HS6HS1LC1HC2HC2LCOUTIloadVOUTESL2C1H,C2H discharging,C1L,C2L

100、chargingL demagnetizingC1LLVINS1HS2HS3HS4HS5HS6HS1LC1HC2HC2LL pathC pathICFLYCOUTIloadVOUTESLS2LS2LILIL_DC=tP=I2RILOAD3+2D3JJ Reduced Conduction Loss31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference14 of

101、48Dual-Path Series-Capacitor ConverterDisadvantagesRipple noise on VOUTDisturb RF circuitLarge switching voltage spikeDisturb RF circuitC1H,C2H charging,C1L,C2L dischargingL magnetizing1C1LLVINS1HS2HS3HS4HS5HS6HS1LC1HC2HC2LCOUTIloadVOUTESL2C1H,C2H discharging,C1L,C2L chargingL demagnetizingC1LLVINS1

102、HS2HS3HS4HS5HS6HS1LC1HC2HC2LL pathC pathICFLYCOUTIloadVOUTESLS2LS2LLL Large Switching Spike IcFLYtItVSWVtVOUTV31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference15 of 48Multi-Phase Hybrid Step-Down Converte

103、rDisadvantagesRipple noise on VOUTDisturb RF circuitIL2VOUTCOUTVINIL1IL3CF1CF21S1HS2HS3HS1LS2LS3LIL2VOUTCOUTVINIL1IL3CF1CF22S1HS2HS3HS1LS2LS3LIL2VOUTCOUTVINIL1IL3CF1CF23S1HS2HS3HS1LS2LS3LIL2VOUTCOUTVINIL1IL3CF1CF24S1HS2HS3HS1LS2LS3LL1L2L3L1L2L3L1L2L3L1L2L3JJ D=9.09%-13.89%JJ Reduced Voltage Stress(V

104、IN/3)JJ Reduced Conduction Loss31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference16 of 48Multi-Phase Hybrid Step-Down ConverterDisadvantagesRipple noise on VOUTDisturb RF circuit1Low DHigh DISUMISUMVOUTIL2

105、IL3VOUT3-phase33%66%D=50%IL23P4SLL Multi-Phase Ripple Cancellation fails at low and high duties.31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference17 of 48Design GoalsOne-step conversionLow CR step-down con

106、verterReduce voltage stressReduce conduction lossEliminate output rippleUse switched capacitorUse multi-phase topologySolve the problem that multi-phase current cancellation will fail at low duty 31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE Inte

107、rnational Solid-State Circuits Conference18 of 48OutlineIntroductionProposed Ripple-Less Buck Converter with Inverted AC Current Replica Circuit for 5G NR LEO ApplicationMeasurement ResultsConclusions31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE

108、International Solid-State Circuits Conference19 of 48Architecture of Proposed IACCR Circuit Inverted AC Current Replica(IACCR)CircuitIACCR generates inverted current IRby using the sum of two-phase inductor currentsISUMsupplies dc current to outputIRhas only ac ripple of ILa+bVOUTVINISUMCFInvertedRe

109、plicaILaIRILbLbLaILaILb00000ILa+bIRISUMVOUTInverted IL,ACIL,DC only31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference20 of 48Prior arts reduce the current ripple by less than 20%.If applying IACCR,the idea

110、l current ripple can be zero.Normalized Current RippleN:number of phaseM:floor(NxD)IRip_norm=N1D D DMN1+MNDNormalized Current Ripple at COUT(1-phase)(2-phase)(3-phase)31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuit

111、s Conference21 of 48Overall Architecture of Proposed RLBCThe proposed RLBC(Ripple-Less Buck Converter)includesAssistant inductance(AI)to emulate the inductor current Ripple minimization(RM)to address dead time eventLaVOUTVINCoutIoutLbC1CIRVLxaVLxbLIRVS3VS4VS1VS2VS6VLS0:3EAVREFVEALogicCircuitLS&Drive

112、rVS2VS6VS3VS4VS56compVS5VS1AssistantInductanceVLxIRRippleMinimizationS3S1S2S6S5S4ADCVINSlope compensationLow CRReduce voltage stress31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference22 of 48Operation of Pr

113、oposed RLBCLaVOUTVINCoIoLbLIRC1CIRVLxaVLxbPhase1(1)ILaILbIL,IRPhase2(2)LaVOUTVINCoIoLbLIRC1CIRVLxaVLxbILaILbIL,IRPhase4(4)LaVINIL,sumIL,sumPhase3(3)VLxaVOUTCoIoLbLIRC1CIRVLxbILaILbIL,IRIL,sumProposed IACCRVLxIRVLxIRVLxIRS1S2S3S4S5S6S1S2S3S4S5S6LaVOUTVINCoIoLbLIRC1CIRVLxaVLxbILaILbIL,IRIL,sumVLxIRS1S

114、2S3S4S5S6S1S2S3S4S5S6V1V1V1V1-VOUTL-VOUTLVIN-VC1-VCIR-VOUTL-VOUTL-VOUTL-2VOUTLVC1+VCIR-2VOUTLPhase 1Phase 2&4Phase 3ILaILbILa+bVC1+VCIR-VOUTLVIN-VC1-VCIR-2VOUTLIL,IR-(VC1+VCIR-2VOUT)L2VOUTL-(VIN-VC1-VCIR-2VOUT)LVC1+VCIR=VIN2Cancel CancelCancel31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM fo

115、r 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference23 of 48Operation of Proposed RLBC-VOUTL-VOUTLVIN-VC1-VCIR-VOUTL-VOUTL-VOUTL-2VOUTLVC1+VCIR-2VOUTLPhase 1Phase 2&4Phase 3ILaILbILa+bVC1+VCIR-VOUTLVIN-VC1-VCIR-2VOUTLIL,IR-(VC1+VCIR-2VOUT)L2VOUTL-(VIN-VC1-VCIR-2VO

116、UT)LILaILbILa+ILbIL,IR IL,sum12341234ILa+bIL,IR-VOUTLIRVCIR-VOUTLIR-VOUTLIRtttD1/2-DD1/2-D1 and 3 are extracting periods2 and 4 are backfill periodsD1-DFind the value of VCIRand LIR(Larger than VOUT)(Function of VIN)31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Applic

117、ation 2024 IEEE International Solid-State Circuits Conference24 of 48Proposed Assistant Inductance(AI)CircuitVINNormalize to w/o IACCRVLS0:300000001001101111111N01234If choosing LIR=L/14.5Normalized current ripple=0%at VIN=33VCurrent ripple increases as VINdecreases so that it is necessary to adapt

118、the value of LIR31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference25 of 48Suppress normalized current ripple below 10%Divide input voltage range into 5 sections(VIN=21V+3N)Use the inductance value at VIN=2

119、1V(LIR=L/8.5)Proposed Assistant Inductance(AI)CircuitVINNormalize to w/o IACCRVLS0:300000001001101111111N0123431.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference26 of 48Proposed Assistant Inductance(AI)Circ

120、uit-2VOUTLVC1+VCIR-2VOUTLPhase 1Phase 2&4Phase 3ILa+bVIN-VC1-VCIR-2VOUTLIL,IR-VOUTLIRVCIR-VOUTLIR-VOUTLIRLIR=2VOUT LVIN 4VOUTIL,sum=VIN/22VOUTL8.5VOUTL+1.5NVOUTLVCIRVDDVOUTRRVbiasCintVOUTP1&P3P2&P4VLS0:3MP0:3VLS0:3MN0:3IPVintIMULVbiasVbiasgmINCurrent source stageIP=VOUTR=RCintL1.5ChoosedVintdt=NVOUT

121、RCintDrain current from output31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference27 of 48-N(VCIR-VOUT)RCintdVintdt=VCIR-VOUTRIN,IL,sum=2VOUTL+8.5(VCIRVOUT)L+1.5N(VCIRVOUT)L-2VOUTLVC1+VCIR-2VOUTLPhase 1Phase

122、 2&4Phase 3ILa+bVIN-VC1-VCIR-2VOUTLIL,IR-VOUTLIRVCIR-VOUTLIR-VOUTLIRProposed Assistant Inductance(AI)CircuitLIR=2VOUT LVIN 4VOUT=RCintL1.5ChooseVCIRVDDVOUTRRVbiasCintVOUTP1&P3P2&P4VLS0:3MP0:3VLS0:3MN0:3IPCurrent sink stageVintIMULVbiasVbiasgmINCurrent source stageSource current to output31.2:A Rippl

123、e-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference28 of 48Proposed Assistant Inductance(AI)CircuitVCIRVDDVOUTRRVbiasCintVOUTP1&P3P2&P4VLS0:3MP0:3VLS0:3MN0:3IPCurrent sink stageVintIMULVbiasVbiasgmINCurrent source stag

124、eVIN21V27VVLS0:3000000111111IMUL0001011124V30V33VtVOUTtWithout AIWith AItIL,SUMWithout AIThe current ripple of IL,SUMincreases as VINincreases,leading to significant voltage ripple on VOUT.With AIAs VINincreases,AI will sink more current from VOUTat 1and 3.While at 2and 4,AI will source more current

125、 to VOUT31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference29 of 48S5 onS2 onS6 onDelay mismatchBoth decreasingVS1VS2VS5VS6VLxaVLxIRILaIL,IRIL,SUMtoffS5Fail to cancel current rippleS2 onS5 onNon-overlapping

126、VOUTBoth increasingtonS1toffS1toffS6Induce output ripple4 S1 on12Timing Diagram from 4to 1LaVOUTVINCoIoLbLIRC1CIRVLxaVLxbPhase1(1)ILaILbIL,IRPhase4(4)IL,sumProposed IACCRVLxIRS1S2S3S4S5S6LaVOUTVINCoIoLbLIRC1CIRVLxaVLxbILaILbIL,IRIL,sumVLxIRS1S2S3S4S5S6S5turns off and body diode of S6is conducted 31.

127、2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference30 of 48S5 onS2 onS6 onDelay mismatchBoth decreasingVS1VS2VS5VS6VLxaVLxIRILaIL,IRIL,SUMtoffS5Fail to cancel current rippleS2 onS5 onNon-overlappingVOUTBoth in

128、creasingtonS1toffS1toffS6Induce output ripple4 S1 on12Cross Non-OverlappingPostpone the time turning off S5IL,IRwill have the rising slope while ILastill have the falling slopeCross Non-OverlappingonononVS5VS6VLxaVLxIR4Non-overlapping of S1 and S2Postpone toffS5onAlignmentVS2VS1Cross-reference non-o

129、verlappingtttttt1Misalignment31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference31 of 48S5 onS2 onS6 onDelay mismatchBoth decreasingVS1VS2VS5VS6VLxaVLxIRILaIL,IRIL,SUMtoffS5Fail to cancel current rippleS2 o

130、nS5 onNon-overlappingVOUTBoth increasingtonS1toffS1toffS6Induce output ripple4 S1 on12LaVOUTVINCoIoLbLIRC1CIRVLxaVLxbPhase1(1)ILaILbIL,IRIL,sumProposed IACCRVLxIRS1S2S3S4S5S6Phase2(2)LaVOUTVINCoIoLbLIRC1CIRVLxaVLxbILaILbIL,IRIL,sumVLxIRS1S2S3S4S5S6Timing Diagram from 1to 2VLxIRwill be pulled high wh

131、en S6 is turned offVLXawill be pulled low when S1 is turned off31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference32 of 48Operation of Proposed RLBCLaVOUTVINCoIoLbLIRC1CIRVLxaVLxbPhase1(1)ILaILbIL,IRPhase2(

132、2)LaVOUTVINCoIoLbLIRC1CIRVLxaVLxbILaILbIL,IRPhase4(4)LaVINIL,sumIL,sumPhase3(3)VLxaVOUTCoIoLbLIRC1CIRVLxbILaILbIL,IRIL,sumProposed IACCRVLxIRVLxIRVLxIRS1S2S3S4S5S6S1S2S3S4S5S6LaVOUTVINCoIoLbLIRC1CIRVLxaVLxbILaILbIL,IRIL,sumVLxIRS1S2S3S4S5S6S1S2S3S4S5S6Phase2 to phase3Delay the time turning off S5Tur

133、n on S3early Phase3 to phase4Align the timing of S3with S631.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference33 of 48Misalignment Detector(MD)S5 onS2 onS6 onDelay mismatchBoth decreasingVS1VS2VS5VS6VLxaVLxI

134、RILaIL,IRIL,SUMtoffS5Fail to cancel current rippleS2 onS5 onNon-overlappingVOUTBoth increasingtonS1toffS1toffS6Induce output ripple4 S1 on12VLxaVLxbVLxIRFSMS1on0:3S3off0:3S3on0:3S1off0:3VAMVBMLSLSLSENS2ENS4Misalignment DetectorVLxIRAlignedVLxa(VLxb)VAMis asserted from phase4 to phase1Adjust S1to tur

135、n on earlier based on S1onVAMis asserted from phase1 to phase2Adjust S1to turn off earlier based on S1off31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference34 of 48The Level Shifter and Driver in Prior ArtD

136、isadvantageRequire large IQto prevent Vclampfrom dropping too lowCannot adjust delayVS1(or VS3)VIN(or VC1+VCIR)IQ IsinkPWMVclampIdriverIdriverLL Require Large IQ and Isink31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Cir

137、cuits Conference35 of 48S1off0:3S1on0:3JJ Small IQ for biasControl driver current for alignmentClamping mosClamping mosIdriverIdriverPWMVS1(or VS3)VIN(or VC1+VCIR)VclampProposed Level Shifter and DriverImprovementOnly small IQfor biasAdjustable delay31.2:A Ripple-Less Buck Converter with Sub-21.94dB

138、 EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference36 of 48Operation of Ripple Minimization(RM)CircuitS1on0:3S1off0:3000000010011000000010011VOUTtReduce IL,SUM and VOUT rippleIL,SUMRM consists of cross non-overlapping and misalignment detector.The falling

139、slope of IL,SUMwill be mitigated by turning on S1faster.The rising slope of IL,SUMwill be mitigated by turning off S1slower.31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference37 of 48OutlineIntroductionProp

140、osed Ripple-Less Buck Converter with Inverted AC Current Replica Circuit for 5G NR LEO ApplicationMeasurement ResultsConclusions31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference38 of 48Chip MicrographProc

141、ess:180nm BCDSwitching frequency:2MHzInput voltage:21V33VOutput voltage:1VActive area:27901880um22.79mm1.88mmControllerS1&S3S2&S4S5&S631.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference39 of 48Measurement R

142、esultsMeasured AI waveformVCIRdecreases as VINincreases but still larger than VOUT.Without AI,the output ripple will grow up in response to increasing VIN.With AI,it will drain or source more current to suppress the output ripple.Ripple 2.98mVRipple 3.74mVVCIR=1.23VVCIR=1.17VVCIR=1.13V21V27VRipple 4

143、.08mV33V100s/div6V/div5mV/div5mV/divVINVOUTVLxIRIOUT=2A,VOUT=1VRipple 2.68mVRipple 2.99mVRipple 2.96mV21V27V33VIOUT=2A,VOUT=1V100s/div6V/div5mV/div5V/div5V/divVINVLS1VLS3VOUTw/o AIw/AI31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International So

144、lid-State Circuits Conference40 of 48VAMVLxaVLxIRVLxa and VLxIR are aligned.50V/div650mV/div10V/div5V/divVIN=33V2s/div0V0V0VMeasurement ResultsMeasured w/o RM circuitBefore RM circuit adjustment,the timing gap is about 15ns.IL,IRand ILahave negative slopes resulting in larger current ripple.100ns/di

145、v1.04A750mV/div10V/div500mA/div500mA/divVLxaVLxIRIL,IRILa330mA0V0V15nsZoom In31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference41 of 48Measurement ResultsMeasured RM circuitOnce the adjustment procedure is

146、 complete,VAMwill no longer be triggered.The timing gap between two edges is reduced to 4.4ns.VAMVLxaVLxIRVLxa and VLxIR are aligned.50V/div650mV/div10V/div5V/divVIN=33V2s/div0V0V0VVLxaVLxIRIL,IRILa4.4ns100ns/div1V/div10V/div1A/div500mA/div-588mA48mA0V0V31.2:A Ripple-Less Buck Converter with Sub-21.

147、94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference42 of 48Measurement ResultsMeasured RM circuitIL,IRonly has AC current.To cancel the current ripple of ILa+b,the frequency of IL,IRis twice of the frequency of ILaand ILb.After RM circuit adjustment,th

148、e VOUTripple is reduced to 2.8mV.500mA/div5mV/divVOUT ripple 3.7mV1s/divVIN=33V,VOUT=1V,IOUT=1A500mA/div500mA/divIL,IRILaILbVOUTVOUT ripple 2.8mV5mV/div500mA/div500mA/div500mA/div1s/divIL,IRILaILbVOUTVIN=33V,VOUT=1V,IOUT=1Aw/o RMw/RM31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low E

149、arth Orbit Application 2024 IEEE International Solid-State Circuits Conference43 of 48The output ripple is smaller than 5mV in full range of VINand IOUTPeak efficiency 93.5%is reached when VIN=33V and IOUT=1AMeasurement Results0.112341.522.533.544.55VOUT(mV)IOUT(A)27V to 1V33V to 1V21V to 1VMinimum

150、VOUT ripple 1.81mVVOUT 5mV in full range of VIN and IOUT0.11234IOUT(A)74%76%78%80%82%84%86%88%90%92%94%EFF(%)27V to 1V33V to 1V21V to 1VPeak efficiency 93.5%31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conferen

151、ce44 of 48Comparison TableThis workProcess0.18m BCD4 VLSI20220.18m HV BCD2 ISSCC 20230.18m BCDTopologyReSC-PL3P4S3 ISSCC2020Tri-State DSD0.18m HV BCDIOUT4A5A4A3AFSW3x1.5MHz0.8MHz1MHz2MHzInput Voltage21-33V12-48V12V12V/24VEVMOutput rippleIOUT 50mV1.8A65mV5A 50mV1AInductor2x1H,110nH3x0.33H1H2x0.56HCOU

152、T4.7F4.7F100F10FOutput Voltage1V0.6-1.2V1V1V1.81mV1A1 ISSCC20230.18m BCDDual-path SC5A1MHz9-16V200mV1A*0.68H22F0.6-1.6VCFLY2x0.6F2x1F2x22F2x10F2x1F4x10F-28.85dB-17.5dB*-15.22dB*-17.5dB*-4.76dB*Efficiency VOUT93.5 1V90.7 1V91.8 1V88.3 1V93.4 1VRLBC*Estimate from Figure or Graph*Calculate by VOUT ripp

153、le31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference45 of 48OutlineIntroductionProposed Ripple-Less Buck Converter with Inverted AC Current Replica Circuit for 5G NR LEO ApplicationMeasurement ResultsConcl

154、usions31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference46 of 48The proposed RLBC is for 5G NR LEO application.Low ripple power source for RF circuit transmissionEVM -21.94dBLow conversion ratioThe AI circ

155、uitPrevent using too many inductors in response to wide input rangePrevent VOUTincreasing as VINincreasesReduce VOUTfrom 4.08mV to 2.96mVConclusions31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference47 of 4

156、8The RM circuitCross non-overlappingMisalignment detectorSynchronize the switching moment of power MOSFETsReduce the time difference of two switches from 15ns to 4.4nsSpeed-adjustable driverLower down IQCooperate with RM circuitWith IACCR,AI and RM,VOUTis minimized to 2.68mV without large COUT96%sma

157、ller than prior artsConclusions31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2024 IEEE International Solid-State Circuits Conference48 of 48Thanks for your attention31.2:A Ripple-Less Buck Converter with Sub-21.94dB EVM for 5G Low Earth Orbit Application 2

158、024 IEEE International Solid-State Circuits Conference49 of 48Please Scan to Rate Please Scan to Rate This PaperThis Paper31.3:A 950ns 0.5-to-5.5V 5G NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Power Tracking 2024 IEEE International Solid-State Circuits Conference1 of 32A 95

159、0ns 0.5-to-5.5V 5G NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Power TrackingIk-Hwan Kim,Jeong-Il Seo,Younghwan Choo,Seungchan Park,Jaeyeol Han,Woosik Kim,Sungyoub Jung,Taehyuk Ko,Dongsu Kim,Jongwoo Lee,Sungung KwakSamsung Electronics,Korea31.3:A 950ns 0.5-to-5.5V 5G NR RF P

160、A Supply Modulator with Floating Capacitor Control for Symbol Power Tracking 2024 IEEE International Solid-State Circuits Conference2 of 32Outline IntroductionWhy Need SPT?Prior Arts for Fast Transient Proposed Supply ModulatorFast Transient Supply ModulatorCircuit ImplementationSPT Operation with T

161、iming Diagram Measurement Results Conclusion31.3:A 950ns 0.5-to-5.5V 5G NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Power Tracking 2024 IEEE International Solid-State Circuits Conference3 of 32Outline IntroductionWhy Need SPT?Prior Arts for Fast Transient Proposed Supply Mod

162、ulatorFast Transient Supply ModulatorCircuit ImplementationSPT Operation with Timing Diagram Measurement Results Conclusion31.3:A 950ns 0.5-to-5.5V 5G NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Power Tracking 2024 IEEE International Solid-State Circuits Conference4 of 32Int

163、roduction:Why Need SPT?5G NR 60kHz SCS has a CP length of 1.2s APT:Not suitable for supporting symbol powerSPT TransitionAPT TransitionRequired Voltage of PAEVMVoltageAPTSPTUL Symbol 0EVM DegradationPower WasteAPTSPTUL Symbol 1UL Symbol 2UL Symbol 13Symbol:16.6usCP Length:1.2usAPT:Average Power Trac

164、kingSPT:Symbol Power Tracking31.3:A 950ns 0.5-to-5.5V 5G NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Power Tracking 2024 IEEE International Solid-State Circuits Conference5 of 32Outline IntroductionWhy Need SPT?Prior Arts for Fast Transient Proposed Supply ModulatorFast Tran

165、sient Supply ModulatorCircuit ImplementationSPT Operation with Timing Diagram Measurement Results Conclusion31.3:A 950ns 0.5-to-5.5V 5G NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Power Tracking 2024 IEEE International Solid-State Circuits Conference6 of 32Introduction:Prior

166、 Arts for Fast Transient Floating Load Capacitor/Simple Structure(NMOS Switch)Assist LDO/Falling Transition X/Large CLPaek,ISSCC 2019Paek,ISSCC 2019Baek,ISSCC 202031.3:A 950ns 0.5-to-5.5V 5G NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Power Tracking 2024 IEEE International S

167、olid-State Circuits Conference7 of 32Introduction:Prior Arts for Fast Transient Fast Transition Time(2.6V/300ns)Too Many Resources(Buck/L,C)/Only Buck ModePaek,ISSCC 2019Paek,ISSCC 2019Baek,ISSCC 202031.3:A 950ns 0.5-to-5.5V 5G NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Pow

168、er Tracking 2024 IEEE International Solid-State Circuits Conference8 of 32Introduction:Prior Arts for Fast Transient 3-Level Buck-Boost:Continuous Mode Low Efficiency in Low Power ModePaek,ISSCC 2019Paek,ISSCC 2019Baek,ISSCC 202031.3:A 950ns 0.5-to-5.5V 5G NR RF PA Supply Modulator with Floating Cap

169、acitor Control for Symbol Power Tracking 2024 IEEE International Solid-State Circuits Conference9 of 32Outline IntroductionWhy Need SPT?Prior Arts for Fast Transient Proposed Supply ModulatorFast Transient Supply ModulatorCircuit ImplementationSPT Operation with Timing Diagram Measurement Results Co

170、nclusion31.3:A 950ns 0.5-to-5.5V 5G NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Power Tracking 2024 IEEE International Solid-State Circuits Conference10 of 32DigitalRFINRFOUTRF Power AmplifierS5S6VBATSA1SA2SA3SA4CFAVBATSB1SB2SB3SB4CFBVBATS0InterleavedBuck-BoostLPM PMOSSPT Fu

171、nction BlockInterleaved Buck-BoostController(+ZCD,FSW)APTDACSWCCHGSWCDRVBodySELVHHGENCHGCMPVCCVBAT2G LDOLBBCSPTCAPTOn-Chip(Exclude LBB,CAPT,CSPT)PWMControllerS1S4 DriverVREFRFB1RFB2CF2CFCF1RFR1R2GSMDRVPTRDriverSPT SWCVBVGATEVGATESGSMSSPTRF PAVLXMIPIRFFEDecoderUVLOProtectionsEnablesMainControllerChan

172、nel AChannel BFast Transient Supply Modulator Floating capacitor control for SPT(w/Interleaved BB)Only one NMOS switch with auxiliary blocksInterleaved Buck-BoostVCCCAPTLBBCSPTSPT Function BlockSWC ChargerVBATSWC DriverVBATVHH GeneratorVLLVGATECHG ComparatorBody SelectorVBATVHHVLLVHHVLLVLLVHHVHHVLLV

173、BATVHHVBATRRRRRFBRFBRCCCVHH Clamp.CircuitVLLVBATVBVBSPT SWCSSPT31.3:A 950ns 0.5-to-5.5V 5G NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Power Tracking 2024 IEEE International Solid-State Circuits Conference11 of 32Outline IntroductionWhy Need SPT?Prior Arts for Fast Transient

174、 Proposed Supply ModulatorFast Transient Supply ModulatorCircuit ImplementationSPT Operation with Timing Diagram Measurement Results Conclusion31.3:A 950ns 0.5-to-5.5V 5G NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Power Tracking 2024 IEEE International Solid-State Circuits

175、Conference12 of 32SPT Function Block 1:SWC Driver In steady-state,VGATE=VBAT/SSPTfully turn-on In transient-state,VGATE=VLL/SSPTfully turn-offWaveforms of VHH,VB,VLL at VCC TransitionVBVLLVHHVCCGNDVHH ClampingTime(s)Voltage(V)VLL=GNDVLL=VBCSPTDischarging-VLL=GNDCSPTChargingInterleaved Buck-BoostVCCC

176、APTLBBCSPTSPT Function BlockSWC ChargerVBATSWC DriverVBATVHH GeneratorVLLVGATECHG ComparatorBody SelectorVBATVHHVLLVHHVLLVLLVHHVHHVLLVBATVHHVBATRRRRRFBRFBRCCCVHH Clamp.CircuitVLLVBATVBVBSPT SWCSSPTVLL=minVB,GND31.3:A 950ns 0.5-to-5.5V 5G NR RF PA Supply Modulator with Floating Capacitor Control for

177、Symbol Power Tracking 2024 IEEE International Solid-State Circuits Conference13 of 32SPT Function Block 2:SWC Charger VCCtransition is completed VGATE=VLL+VTH VBcharged or discharged by the current source and SSPTWaveforms of VHH,VB,VLL at VCC TransitionVBVLLVHHVCCGNDVHH ClampingTime(s)Voltage(V)VLL

178、=GNDVLL=VBCSPTDischargingVLL=GNDCSPTChargingInterleaved Buck-BoostVCCCAPTLBBCSPTSPT Function BlockSWC ChargerVBATSWC DriverVBATVHH GeneratorVLLVGATECHG ComparatorBody SelectorVBATVHHVLLVHHVLLVLLVHHVHHVLLVBATVHHVBATRRRRRFBRFBRCCCVHH Clamp.CircuitVLLVBATVBVBSPT SWCSSPTVLL=minVB,GND31.3:A 950ns 0.5-to-

179、5.5V 5G NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Power Tracking 2024 IEEE International Solid-State Circuits Conference14 of 32SPT Function Block 3:CHG Comparator VBapproaches the ground SSPTfully turn-on Large inrush current may flow:Require to design a robust CMPWavefor

180、ms of VHH,VB,VLL at VCC TransitionVBVLLVHHVCCGNDVHH ClampingTime(s)Voltage(V)VLL=GNDVLL=VBCSPTDischargingVLL=GNDCSPTChargingInterleaved Buck-BoostVCCCAPTLBBCSPTSPT Function BlockSWC ChargerVBATSWC DriverVBATVHH GeneratorVLLVGATECHG ComparatorBody SelectorVBATVHHVLLVHHVLLVLLVHHVHHVLLVBATVHHVBATRRRRRF

181、BRFBRCCCVHH Clamp.CircuitVLLVBATVBVBSPT SWCSSPTVLL=minVB,GND31.3:A 950ns 0.5-to-5.5V 5G NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Power Tracking 2024 IEEE International Solid-State Circuits Conference15 of 32SPT Function Block 4:Body Selector VLL=VB(VB VBATVHH=0V to ensure

182、 the stability of VHHgenerator VLL=minVB,GND31.3:A 950ns 0.5-to-5.5V 5G NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Power Tracking 2024 IEEE International Solid-State Circuits Conference17 of 32Outline IntroductionWhy Need SPT?Prior Arts for Fast Transient Proposed Supply Mo

183、dulatorFast Transient Supply ModulatorCircuit ImplementationSPT Operation with Timing Diagram Measurement Results Conclusion31.3:A 950ns 0.5-to-5.5V 5G NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Power Tracking 2024 IEEE International Solid-State Circuits Conference18 of 32S

184、PT Operation Phase 1:Steady-state Steady-state:SSPTfully turn-on VB=Ground VLL=Ground&VGATE=BatteryInterleaved Buck-BoostVCCCAPTLBBCSPTSPT Function BlockSWC ChargerVBATSWC DriverVBATVHH GeneratorVLLVGATECHG ComparatorBody SelectorVBATVHHVLLVHHVLLVLLVHHVHHVLLVBATVHHVBATRRRRRFBRFBRCCCVHH Clamp.Circuit

185、VLLVBATVBVBSPT SWCSSPT0.5V5.5V0V-5V5VCPUplink(UL)Symbol 2UL Symbol 1-5V+VTH_SWC0V+VTH_SWCVBATCPUplink(UL)Symbol 3Phase 1Phase 3Phase 1Phase 31.2sVGATEVBVCCVLX0VVBAT2VBAT16.6sFSW&ZCD OffFSW&ZCD OffBKBBBTBBBKFSW 4MHzFSW 7MHzFSW 4MHzFSW 7MHzFSW 4MHzPhase 2Phase 2Phase 131.3:A 950ns 0.5-to-5.5V 5G NR RF

186、 PA Supply Modulator with Floating Capacitor Control for Symbol Power Tracking 2024 IEEE International Solid-State Circuits Conference19 of 32SPT Operation Phase 2:Rising Transient-state:SSPTfully turn-off VB Ground VLL=Ground&VGATE=Ground(Fixed)Interleaved Buck-BoostVCCCAPTLBBCSPTSPT Function Block

187、SWC ChargerVBATSWC DriverVBATVHH GeneratorVLLVGATECHG ComparatorBody SelectorVBATVHHVLLVHHVLLVLLVHHVHHVLLVBATVHHVBATRRRRRFBRFBRCCCVHH Clamp.CircuitVLLVBATVBVBSPT SWCSSPT0.5V5.5V0V-5V5VCPUplink(UL)Symbol 2UL Symbol 1-5V+VTH_SWC0V+VTH_SWCVBATCPUplink(UL)Symbol 3Phase 1Phase 3Phase 1Phase 31.2sVGATEVBV

188、CCVLX0VVBAT2VBAT16.6sFSW&ZCD OffFSW&ZCD OffBKBBBTBBBKFSW 4MHzFSW 7MHzFSW 4MHzFSW 7MHzFSW 4MHzPhase 2Phase 2Phase 131.3:A 950ns 0.5-to-5.5V 5G NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Power Tracking 2024 IEEE International Solid-State Circuits Conference20 of 32SPT Operati

189、on Phase 3:Discharging Discharging-state:SSPTslightly turn-on VB Ground VLL=Ground&VGATE=VTHof SWC(Fixed)Interleaved Buck-BoostVCCCAPTLBBCSPTSPT Function BlockSWC ChargerVBATSWC DriverVBATVHH GeneratorVLLVGATECHG ComparatorBody SelectorVBATVHHVLLVHHVLLVLLVHHVHHVLLVBATVHHVBATRRRRRFBRFBRCCCVHH Clamp.C

190、ircuitVLLVBATVBVBSPT SWCSSPT0.5V5.5V0V-5V5VCPUplink(UL)Symbol 2UL Symbol 1-5V+VTH_SWC0V+VTH_SWCVBATCPUplink(UL)Symbol 3Phase 1Phase 3Phase 1Phase 31.2sVGATEVBVCCVLX0VVBAT2VBAT16.6sFSW&ZCD OffFSW&ZCD OffBKBBBTBBBKFSW 4MHzFSW 7MHzFSW 4MHzFSW 7MHzFSW 4MHzPhase 2Phase 2Phase 131.3:A 950ns 0.5-to-5.5V 5G

191、 NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Power Tracking 2024 IEEE International Solid-State Circuits Conference21 of 32SPT Operation Phase 2:Falling Transient-state:SSPTfully turn-off VB Ground VLL=VB&VGATE=VB(Not Fixed)Interleaved Buck-BoostVCCCAPTLBBCSPTSPT Function Bl

192、ockSWC ChargerVBATSWC DriverVBATVHH GeneratorVLLVGATECHG ComparatorBody SelectorVBATVHHVLLVHHVLLVLLVHHVHHVLLVBATVHHVBATRRRRRFBRFBRCCCVHH Clamp.CircuitVLLVBATVBVBSPT SWCSSPT0.5V5.5V0V-5V5VCPUplink(UL)Symbol 2UL Symbol 1-5V+VTH_SWC0V+VTH_SWCVBATCPUplink(UL)Symbol 3Phase 1Phase 3Phase 1Phase 31.2sVGATE

193、VBVCCVLX0VVBAT2VBAT16.6sFSW&ZCD OffFSW&ZCD OffBKBBBTBBBKFSW 4MHzFSW 7MHzFSW 4MHzFSW 7MHzFSW 4MHzPhase 2Phase 2Phase 131.3:A 950ns 0.5-to-5.5V 5G NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Power Tracking 2024 IEEE International Solid-State Circuits Conference22 of 32SPT Oper

194、ation Phase 3:Charging Charging-state:SSPTslightly turn-on VB Ground VLL=VB&VGATE=VB+VTHof SWC(Not Fixed)Interleaved Buck-BoostVCCCAPTLBBCSPTSPT Function BlockSWC ChargerVBATSWC DriverVBATVHH GeneratorVLLVGATECHG ComparatorBody SelectorVBATVHHVLLVHHVLLVLLVHHVHHVLLVBATVHHVBATRRRRRFBRFBRCCCVHH Clamp.C

195、ircuitVLLVBATVBVBSPT SWCSSPT0.5V5.5V0V-5V5VCPUplink(UL)Symbol 2UL Symbol 1-5V+VTH_SWC0V+VTH_SWCVBATCPUplink(UL)Symbol 3Phase 1Phase 3Phase 1Phase 31.2sVGATEVBVCCVLX0VVBAT2VBAT16.6sFSW&ZCD OffFSW&ZCD OffBKBBBTBBBKFSW 4MHzFSW 7MHzFSW 4MHzFSW 7MHzFSW 4MHzPhase 2Phase 2Phase 131.3:A 950ns 0.5-to-5.5V 5G

196、 NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Power Tracking 2024 IEEE International Solid-State Circuits Conference23 of 32Outline IntroductionWhy Need SPT?Prior Arts for Fast Transient Proposed Supply ModulatorFast Transient Supply ModulatorCircuit ImplementationSPT Operati

197、on with Timing Diagram Measurement Results Conclusion31.3:A 950ns 0.5-to-5.5V 5G NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Power Tracking 2024 IEEE International Solid-State Circuits Conference24 of 32Measurement APT Transition CSPT(4.7uF)+CAPT(470nF)transition time:8.3us/

198、8.4us SSPTalways turns on VBfixed at 0V,no transitionAPT UP TransitionAPT DN TransitionVCCVB5.5V0.5V0V8.4sVCCVB0.5V5.5V8.3s0V31.3:A 950ns 0.5-to-5.5V 5G NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Power Tracking 2024 IEEE International Solid-State Circuits Conference25 of 32

199、Measurement SPT Transition:Rising 0.5-to-5.5V rising transition time:820ns CAPT(470nF)period:ZCD off/FSW increase Ripple reductionSPT UP Zoom outSPT UP Zoom inVCCVB0.5V5.5V0V0V5VPhase 1Phase 3Phase 1Phase 20.5V5.5V0V5VFSW:4MHzRipple:30mVppFSW:4 7MHzRipple:150 90mVPPVCCVB820ns31.3:A 950ns 0.5-to-5.5V

200、 5G NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Power Tracking 2024 IEEE International Solid-State Circuits Conference26 of 32Measurement SPT Transition:Falling 5.5-to-0.5V falling transition time:950ns CAPT(470nF)period:ZCD off/FSW increase Ripple reductionSPT DN Zoom outSP

201、T DN Zoom inVCCVB0V0V0.5V-5V5.5VPhase 1Phase 3Phase 1Phase 2VCC0.5V5.5VVB0V-5VFSW:4MHzRipple:30mVppFSW:4 7MHzRipple:150 90mVPP950ns31.3:A 950ns 0.5-to-5.5V 5G NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Power Tracking 2024 IEEE International Solid-State Circuits Conference27

202、 of 32Measurement EVM:APT vs.SPT Transition complete within CP lengthEVM degradation reduceAPT TransitionSPT TransitionEVM(%)VCC5V(23dBm)1V(5dBm)EVM 3%5V(23dBm)VCCEVM(%)EVM 10%1V(5dBm)*CP:Cyclic PrefixEVM 8%EVM 1%31.3:A 950ns 0.5-to-5.5V 5G NR RF PA Supply Modulator with Floating Capacitor Control f

203、or Symbol Power Tracking 2024 IEEE International Solid-State Circuits Conference28 of 32Measurement Efficiency Peak efficiency:95.8%Efficiency in LPM is improved up to 5%70758085909510000.20.40.60.811.21.4APT Efficiency(%)VCC=0.5VVCC=1.0VVCC=2.0VVCC=5.5VVCC=4.0VVCC=3.0VVCC=5.0VLoad Current(A)Peak 95

204、.8%VBAT=4V(w/LPM)VCC=0.5V(w/o LPM)5%ImprovementEfficiency Curve*LPM:Low Power Mode31.3:A 950ns 0.5-to-5.5V 5G NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Power Tracking 2024 IEEE International Solid-State Circuits Conference29 of 32Performance SummaryThis WorkAPT,SPT5.5V1.4A

205、90nm3.96mm295.8%1H4.7F/470nFRise:820ns/5VFall:950ns/5V2G,3G,LTE,5G NR sub-6GHz4SPT2.3V1.5A350nm0.388mm2(DC-DC Converter Only)95.4%0.42H1.5FRise:810ns/1VFall:890ns/1V5G NR mmWave1APT,ET5V1A90nm5.0mm2N/A1H2.2F x 2Rise:5s/4.6VFall:5.5s/4.6V2G,3G,LTE,5G NR sub-6GHz2SPT3V1.5A90nm4.07mm295.4%0.47H x 24.7F

206、 x 2Rise:280ns/2.6VFall:300ns/2.6V5G NR mmWaveRef.Supporting ModesMax VCCMax IOUTPeak APT EfficiencyInductorsOutput CapacitorsTransition TimeProcessSizeRadio Access Technology(RAT)3N/A(Buck-Boost)9V2A90nm2.8mm2(DC-DC Converter Only)96.8%1H4.7FRise:4s/4.6VFall:4.5s/4.6VN/A(Buck-Boost)1 NMOS SwitchT D

207、ual Zone ControllerBias&Test Circuit2 Assist-LDOs1 NMOS Switch1 Buck Converter with L=0.47H/C=4.7F4 SwitchesAdditional Resources for Fast TransitionN/A(Buck-Boost)Rise:164ns/VFall:190ns/VRise:810ns/VFall:890ns/VRise:1087ns/VFall:1196ns/VRise:108ns/VFall:115ns/VNormalizedTransition TimeRise:870ns/VFa

208、ll:978ns/VBuck-BoostBuckBuck-BoostBuckTopologyBuck-Boost31.3:A 950ns 0.5-to-5.5V 5G NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Power Tracking 2024 IEEE International Solid-State Circuits Conference30 of 32Outline IntroductionWhy Need SPT?Prior Arts for Fast Transient Propos

209、ed Supply ModulatorFast Transient Supply ModulatorCircuit ImplementationSPT Operation with Timing Diagram Measurement Results Conclusion31.3:A 950ns 0.5-to-5.5V 5G NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Power Tracking 2024 IEEE International Solid-State Circuits Confere

210、nce31 of 32Conclusion Symbol power tracking has few advantages over average power trackingFast transient time,EVM degradation reduce Proposed supply modulator for SPT achieves 1us 0.5-to-5.5V transition time95.8%peak efficiencyEVM degradation 8%(APT)1%(SPT)Simple structure(1 NMOS switch)31.3:A 950ns

211、 0.5-to-5.5V 5G NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Power Tracking 2024 IEEE International Solid-State Circuits Conference32 of 32Thank youEmail:31.3:A 950ns 0.5-to-5.5V 5G NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Power Tracking 2024 IEEE

212、International Solid-State Circuits Conference33 of 32Please Scan to Rate Please Scan to Rate This PaperThis Paper31.4:98.7%Efficiency 1200V-to-48V LLC Converter with CC/CV Mode Charging Compliant with EVSE Level 1 2024 IEEE International Solid-State Circuits Conference1 of 28Tz-Wun Wang1,Sheng-Hsi H

213、ung1,Po-Jui Chiu1,Chi-Yu Chen1,Chang-Lin Go1,Yu-Ting Huang1,Xiao-Quan Wu1,Ke-Horng Chen1,Kuo-Lin Zheng1,2,Ying-Hsi Lin3,Tsung-Yen Tsai3,Shian-Ru Lin398.7%Efficiency 1200V-to-48V LLC Converter with CC/CV Mode Charging Compliant with EVSE Level 11National Yang Ming Chiao Tung University,Taiwan2Chip-Ga

214、N Power Semiconductor Corporation,Taiwan3Realtek Semiconductor,Hsinchu,Taiwan31.4:98.7%Efficiency 1200V-to-48V LLC Converter with CC/CV Mode Charging Compliant with EVSE Level 1 2024 IEEE International Solid-State Circuits Conference2 of 28OutlineIntroductionProposed LLC Flyback ConverterProposed Tr

215、iple Step-Down Converter with One-Inductor Technique(TSDT)Primary-Side Control with Burst Operation Control(BOC)Proposed Reference Voltage Compensator(RVC)Measurement ResultsConclusions31.4:98.7%Efficiency 1200V-to-48V LLC Converter with CC/CV Mode Charging Compliant with EVSE Level 1 2024 IEEE Inte

216、rnational Solid-State Circuits Conference3 of 28OutlineIntroductionProposed LLC Flyback ConverterProposed Triple Step-Down Converter with One-Inductor Technique(TSDT)Primary-Side Control with Burst Operation Control(BOC)Proposed Reference Voltage Compensator(RVC)Measurement ResultsConclusions31.4:98

217、.7%Efficiency 1200V-to-48V LLC Converter with CC/CV Mode Charging Compliant with EVSE Level 1 2024 IEEE International Solid-State Circuits Conference4 of 28Introduction1200VEVSEConverter48VApplication of LLC converterThe 1200V power supply of electric vehicle supply equipment(EVSE)will become the ma

218、instream specification of EV charging base to achieve efficient and fast charging.31.4:98.7%Efficiency 1200V-to-48V LLC Converter with CC/CV Mode Charging Compliant with EVSE Level 1 2024 IEEE International Solid-State Circuits Conference5 of 28Challenges in conventional buck converterThe low voltag

219、e conversion ratio(VCR)of only 4%The hard-switching operation during the high-side(HS)switches turn-onApart from IGBT and SiC devices,few technologies can withstand 1200V stress.VIN=1200VVXVOUT=48VCORloadVOUTVIN=48V1200V=4%Low conversion ratio1200V deviceHard switching1200V deviceIntroduction31.4:98

220、.7%Efficiency 1200V-to-48V LLC Converter with CC/CV Mode Charging Compliant with EVSE Level 1 2024 IEEE International Solid-State Circuits Conference6 of 28Conventional secondary-side topologyA negative VPGNDmeans that a lower reference voltage VREF0overestimates the charging current,so the reduced

221、current increases the charging time.Ls1RparaM1VG1Secondary-SideControllerVBATVSEC1OPTOROPVREF0VSENPrimary-Side ControllerNegative VPGND causes IBAT to be overestimatedILsVPGNDBAT.Ls2M2VSEC2VOUTIBATLaVOUTCaRSEN0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.022.322.622.923.223.523.824.124.724.425.025.3IBAT(I

222、)Vref0(V)Rpara(m)Vref0 Error(%)0123456879101.091.111.131.151.171.191.211.251.231.271.29FactIdealFactIdealIntroduction31.4:98.7%Efficiency 1200V-to-48V LLC Converter with CC/CV Mode Charging Compliant with EVSE Level 1 2024 IEEE International Solid-State Circuits Conference7 of 28OutlineIntroductionP

223、roposed LLC Flyback ConverterProposed Triple Step-Down Converter with One-Inductor Technique(TSDT)Primary-Side Control with Burst Operation Control(BOC)Proposed Reference Voltage Compensator(RVC)Measurement ResultsConclusions31.4:98.7%Efficiency 1200V-to-48V LLC Converter with CC/CV Mode Charging Co

224、mpliant with EVSE Level 1 2024 IEEE International Solid-State Circuits Conference8 of 28Proposed LLC Flyback ConverterThe topology of the proposed LLC flyback converter consists of Triple step-down converter with one-inductor technique(TSDT)Primary-side control with burst operation control(BOC)Refer

225、ence voltage compensator(RVC)LrLmLpCrLs1S1VINS6C1S2C2S3S5S9S7S8S4Triple-Step Down with One Inductor-only Technique(TSDT)VXN:1:1M1VG1Secondary-Side ControllerVPGNDVOUTVSEC1VCOMPOPTO S1-S8Primary-Side Controller with Burst Operation Control(BOC)Ls2VG2VSEC2M2 BatteryRparaRSENVSENRFB1RFB2VFBVREFVREF0Ref

226、erence Voltage Compensator(RVC)VG1VG2ROPVSEC1VSEC2VOFB400V device800V deviceLaCaVBATIBAT31.4:98.7%Efficiency 1200V-to-48V LLC Converter with CC/CV Mode Charging Compliant with EVSE Level 1 2024 IEEE International Solid-State Circuits Conference9 of 28TSDT operationIn phases A-C,VX=VIN/3 In phase D,V

227、X=0C1stores 2VIN/3C2stores VIN/3.In phase D,the parallel topology reduces the equivalent RONto 1/4.5 times that of 5 to reduce conduction loss and improve efficiency.Proposed Triple Step-down Converterwith One-Inductor Technique VINC1C2S1S2S3S4S6S5S7S8S9VXVINC1C2S1S2S3S4S6S5S7S8S9VXVINC1C2S1S2S3S4S6

228、S5S7S8S9VXVINC1C2S1S2S3S4S6S5S7S8S9VXPhase APhase BPhase CPhase D12D56D31.4:98.7%Efficiency 1200V-to-48V LLC Converter with CC/CV Mode Charging Compliant with EVSE Level 1 2024 IEEE International Solid-State Circuits Conference10 of 28Mode transition controlWhen VFBexceeds the reference value VREF2W

229、ith leakage-based ultra-low-IQcomparator(LUC)comparison,the operation will switch from CC to CV mode.S1-S8VCOMPOPTOROPR1VDDVOUTSecond-Side ControllerRFB1RFB2VFBIctrlmodeLeakage-Based Ultra Low-IQ ComparatorPrimary-SideController VthSiVOFBICOMP CC to CV ModeVFBIctrlIcompVOFBmodeVrefVDDVthCC CV Primar

230、ySideSecondarySideTurn off SiCutoff IcompVOFBincreasesSwitch modePrimary Side with Burst Operation Control31.4:98.7%Efficiency 1200V-to-48V LLC Converter with CC/CV Mode Charging Compliant with EVSE Level 1 2024 IEEE International Solid-State Circuits Conference11 of 28CV mode operationSince the bat

231、tery is almost fully charged,the CV mode operates in burst operation.At this time,IQmust be considered in order to obtain better efficiency.VOUTILs1ILs2Off timePrimary Side with Burst Operation Control31.4:98.7%Efficiency 1200V-to-48V LLC Converter with CC/CV Mode Charging Compliant with EVSE Level

232、1 2024 IEEE International Solid-State Circuits Conference12 of 28Leakage-Based Ultra-Low-IQComparator LUC circuitsThe LUC consists of a differential pair with a level shifter and inverter chain.The level shifter comprises dGaN MDX,eGaN MEX,and capacitor CX.C7MD5C1MD1C2MD2C5MD3C6MD4VINVIPVDDME1ME2ME3

233、ME4ME5VLSC8MD6n1n2VINVIPVLSVOUTDifferential pair with level shifterInverter chain31.4:98.7%Efficiency 1200V-to-48V LLC Converter with CC/CV Mode Charging Compliant with EVSE Level 1 2024 IEEE International Solid-State Circuits Conference13 of 28Leakage-Based Ultra-Low-IQComparator DC current blockSi

234、nce dGaN has an inherent gate leakage current,a compact circuit consisting of dGaNand a capacitor in series is proposed.Capacitor Cbblocks the DC current IDS.MDaMDbCbRa Large DC current DC current block Small Cb size Conventional Circuits Large Ra sizeProposed CircuitsSi substrateGaN buffer layerD2D

235、EGGSAlGaN layerInsulatordepletion regionIDGCbIDIGDC current blockIDS Blocked by capacitor10fF31.4:98.7%Efficiency 1200V-to-48V LLC Converter with CC/CV Mode Charging Compliant with EVSE Level 1 2024 IEEE International Solid-State Circuits Conference14 of 28Concept of Reference Voltage CompensationMe

236、chanismWhen a large ILSoccurs,an additional compensated voltage Vcompis added on lower VREF0.Thus,the new reference voltage VREF2can be free from ILScurrent.VG1ILS0AVREF0VcompVREF21.23V1.15V80mV0mV1.23V40A31.4:98.7%Efficiency 1200V-to-48V LLC Converter with CC/CV Mode Charging Compliant with EVSE Le

237、vel 1 2024 IEEE International Solid-State Circuits Conference15 of 28Digital Reference Voltage Compensator M1VPGNDVG1MS1VSEC1VSNSRparaUp/DownCounterCurrentDAC ControlLogicVoltageDAC VREF0VRXCPVGVGCFVREF1 RFVCOMP1 Disadvantage of digital RVCVREF1drops along with VPGNDat light loads and presents a per

238、iodic variation.The digital-based digital-to-analog converter(DAC)generates an overshoot on VRX,so RFand CFare added to filter out undesired noise on VREF1,increasing the area cost.31.4:98.7%Efficiency 1200V-to-48V LLC Converter with CC/CV Mode Charging Compliant with EVSE Level 1 2024 IEEE Internat

239、ional Solid-State Circuits Conference16 of 28Proposed Reference Voltage Compensator Concept of proposed RVCThe RVC uses the sense MOSFET to mirror current from SR M1and proposed LHP zero error amplifier(LZEA)with zero input voltage to compensate VREF0to get a reliable VREF2.M1VPGNDMS1VSNSMaVDDVDDVEA

240、MbVREF0VREF2RparaVcomp2VG1EAVSEC1Rcomp231.4:98.7%Efficiency 1200V-to-48V LLC Converter with CC/CV Mode Charging Compliant with EVSE Level 1 2024 IEEE International Solid-State Circuits Conference17 of 28Proposed LZEAThe dual input VIN+can produceLHPzerodirectlysincethesecond input of VIN+at the sour

241、ceterminal of M12can eliminate theRHP parameter.Since the output capacitance issmall,it can easily achieve highbandwidthandguaranteeasufficient phase margin.BP1BP1VDDBP1M1M2M3M4M5M6M7M8M9M10M11M12CCVOUT2Zerost-gmM10gmM12R1R2+gmM12R2+1gmM12R1R2C1+gmM12R1R2CC-gmM10R1R2CC+R1C1+R1CgsM12+R1CC+R2C2 CgsVIN

242、+VIN-C1C2VOUT1=VOUTAlwaysin LHPVIN+Proposed Reference Voltage Compensator 31.4:98.7%Efficiency 1200V-to-48V LLC Converter with CC/CV Mode Charging Compliant with EVSE Level 1 2024 IEEE International Solid-State Circuits Conference18 of 28Proposed Reference Voltage Compensator The proposed RVC can re

243、duce load regulation from 6.5%to less than 0.1%without periodic variationM1 Current(A)Load Regulation(%)4248121620283236401.02.03.04.05.0 W/o RVCDigital RVCProposed RVC6.5%0.9%10 Mbps.Separated transformers or capacitors for power and each signal.1 H.Ishihara,ISSCC 2020 31.5 A 750-mW,37%Peak Efficie

244、ncy Isolated DC-DC Converter with 54/18-Mbps Full-Duplex Communication Using a Single Pair of Transformers 2024 IEEE International Solid-State Circuits Conference5 of 37IsolationLow-voltage domainHigh-voltage domainDC/DCMCUOscillatorTX/RXRectifierTX/RXSinglePackagePowerControlFeedbackAll-in-One Solu

245、tion Low cost:high-frequency self-oscillating DC-DC.Possible data modulation schemes:ASK,FSK.Power and full-duplex data in the same transformer pair.31.5 A 750-mW,37%Peak Efficiency Isolated DC-DC Converter with 54/18-Mbps Full-Duplex Communication Using a Single Pair of Transformers 2024 IEEE Inter

246、national Solid-State Circuits Conference6 of 37 Motivation Modulation Scheme Implementation Measurement Results and Comparisons ConclusionsOutline31.5 A 750-mW,37%Peak Efficiency Isolated DC-DC Converter with 54/18-Mbps Full-Duplex Communication Using a Single Pair of Transformers 2024 IEEE Internat

247、ional Solid-State Circuits Conference7 of 37RectifierRectifierOscillatorASK 2FSK 3,4OscillatorVINVOUTVOUTVINPrevious SolutionsForward supply modulation:large modulation depth.Backward C-amplitude modulation:small modulation depthSensitive to noise.Forward/backward C-f modulation:large modulation dep

248、th.Less sensitive to noise.Possible two oscillation modes in backward C-f modulation.1 P.Lombardo,ISSCC 2016 3 W.Qin,ISSCC 20194 J.Pan,JSSC 2019 31.5 A 750-mW,37%Peak Efficiency Isolated DC-DC Converter with 54/18-Mbps Full-Duplex Communication Using a Single Pair of Transformers 2024 IEEE Internati

249、onal Solid-State Circuits Conference8 of 37FSK Implementation:CP,CSModulation CSmodulation:two oscillation modes(XIN=0).Complex mode selection,low data rate 4.100150200250300Frequency(MHz)Two oscillation modesCS=20pFCS=50pFLP LMLS LMLMCP gmRIN+jXINCSRSEquivalent Circuit03060RIN()-30030XIN()LPLSkLPLS

250、kOscillatorRectifierCP ModulationCS Modulation100150200250300Frequency(MHz)CP=80pFCP=50pF4 J.Pan,JSSC 2019 31.5 A 750-mW,37%Peak Efficiency Isolated DC-DC Converter with 54/18-Mbps Full-Duplex Communication Using a Single Pair of Transformers 2024 IEEE International Solid-State Circuits Conference9

251、of 37LP LMLS LMLMCP gmRIN+jXINCSRSEquivalent Circuit03060RIN()-30030XIN()100150200250300Frequency(MHz)RS=40RS=10LPLSkLPLSkOscillatorRectifierCP ModulationRS Modulation100150200250300Frequency(MHz)CP=80pFCP=50pFFSK Implementation:CP,RSModulation One oscillation mode.Short circuit switch 5:low output

252、power.4 A.Yousefi,VLSI 201731.5 A 750-mW,37%Peak Efficiency Isolated DC-DC Converter with 54/18-Mbps Full-Duplex Communication Using a Single Pair of Transformers 2024 IEEE International Solid-State Circuits Conference10 of 37IOUTIOUTVOUTIOUT/2IOUT/2VOUTLP LMLS LMLMCP gmRIN+jXINCSRSEquivalent Circui

253、tLPLSkLPLSkOscillator1X/2XRectifier1X Mode2X ModeRS 16VOUT2IOUTRS 4VOUT2IOUTVOUTVOUT/2VOUT/2+RSModulation:1X/2X Rectifier 1X/2X rectifier:always deliver power to the output.31.5 A 750-mW,37%Peak Efficiency Isolated DC-DC Converter with 54/18-Mbps Full-Duplex Communication Using a Single Pair of Tran

254、sformers 2024 IEEE International Solid-State Circuits Conference11 of 37LP LMLS LMLMCP gmRIN+jXINCSRSEquivalent CircuitLPLSkLPLSkOscillator1X/2XRectifierCACA1X2XAdd CARemove CAForward dataBackwarddataOscillationFrequencyCP,RSModulation:4-FSKCP:1-bit forward data;RS:1-bit backward data.Four fOSCs 9%m

255、odulation depth.0123456Rectifier output voltage(V)160180200220240260fOSC(MHz)2x1xForwardBackwardfOSCf0f101000111f2f3f0f1f2f3 CA+CA31.5 A 750-mW,37%Peak Efficiency Isolated DC-DC Converter with 54/18-Mbps Full-Duplex Communication Using a Single Pair of Transformers 2024 IEEE International Solid-Stat

256、e Circuits Conference12 of 37 Motivation Modulation Scheme Implementation Measurement Results and Comparisons ConclusionsOutline31.5 A 750-mW,37%Peak Efficiency Isolated DC-DC Converter with 54/18-Mbps Full-Duplex Communication Using a Single Pair of Transformers 2024 IEEE International Solid-State

257、Circuits Conference13 of 37DataINFOUTBOUTFINBCLKRDLL1X/2X RectifierVP2VP1PWM Encoder(Clock/Data Encoding)VS2VS1VS4VS3Shunt RegulatorVREFVOUTVINDEMPWMBDataClockDEMFSK3FSK2FSK1CDRCLK3FSK2FSKFDFCLK1CLK3VS2VS1 Primary SecondaryForward Data Sync.FSK3FSK1PowerCDROscillatorSystem Block Diagram:Power Stage

258、Forward FSK:oscillator with switched capacitors.Backward FSK:reconfigurable 1X/2X rectifier.Output regulation:shunt regulator absorbs current.31.5 A 750-mW,37%Peak Efficiency Isolated DC-DC Converter with 54/18-Mbps Full-Duplex Communication Using a Single Pair of Transformers 2024 IEEE Internationa

259、l Solid-State Circuits Conference14 of 37BiasBiasVINLPLPCCCCMN1MN2VP1VP2VG1VG2010203040time(ns)010201X2XVP1,VP2(V)IP1Oscillator:Unwanted Sub-Harmonic Oscillation High peak voltage.Variable frequency.Sub-harmonic oscillation:31.5 A 750-mW,37%Peak Efficiency Isolated DC-DC Converter with 54/18-Mbps Fu

260、ll-Duplex Communication Using a Single Pair of Transformers 2024 IEEE International Solid-State Circuits Conference15 of 37Oscillator:Unwanted Sub-Harmonic OscillationVP1VG2IP1cross VTHVTH0BiasBiasVINLPLPCCCCMN1MN2VP1VP2VG1VG2010203040time(ns)010201X2XVP1,VP2(V)IP1 High peak voltage.Variable frequen

261、cy.Sub-harmonic oscillation:VG2cross VTH:end of VP1resonance.31.5 A 750-mW,37%Peak Efficiency Isolated DC-DC Converter with 54/18-Mbps Full-Duplex Communication Using a Single Pair of Transformers 2024 IEEE International Solid-State Circuits Conference16 of 371st resonanceVP1VG2IP1cross 0 before 2nd

262、 resonancecross VTHVTH0BiasBiasVINLPLPCCCCMN1MN2VP1VP2VG1VG2010203040time(ns)010201X2XVP1,VP2(V)IP11st resonanceOscillator:Unwanted Sub-Harmonic Oscillation High peak voltage.Variable frequency.Sub-harmonic oscillation:VG2cross VTH:end of VP1resonance.IP1cross 0 leads :2ndVP1resonance.31.5 A 750-mW,

263、37%Peak Efficiency Isolated DC-DC Converter with 54/18-Mbps Full-Duplex Communication Using a Single Pair of Transformers 2024 IEEE International Solid-State Circuits Conference17 of 371st resonanceVP1VG2IP1cross 0 before 2nd resonancecross VTH1st resonanceReduce VBIASVTH0BiasBiasVINLPLPCCCCMN1MN2VP

264、1VP2VG1VG2010203040time(ns)010201X2XVP1,VP2(V)IP11st resonance Force lead Reduce the Fixed Gate Bias(VBIAS)High peak voltage.Variable frequency.Sub-harmonic oscillation:Force to lead Alleviate sub-harmonic oscillation.High MOSFET on-resistance.VG2cross VTH:end of VP1resonance.IP1cross 0 leads :2ndVP

265、1resonance.31.5 A 750-mW,37%Peak Efficiency Isolated DC-DC Converter with 54/18-Mbps Full-Duplex Communication Using a Single Pair of Transformers 2024 IEEE International Solid-State Circuits Conference18 of 37MN5MP3MP5MP4VPVN MN4IGPIGNIBMN3MP2IBR1MP1MN1MN2VG1VG2VP1VP20VG2VP1IGN IGPVNVP0010203040tim

266、e(ns)01020VP1,VP2(V)1X2XAdaptive Bias Normal oscillation:high gate bias and low MN2on-resistance.Sub-harmonic oscillation:long MN2and MN3turn-on IGN and VG2.31.5 A 750-mW,37%Peak Efficiency Isolated DC-DC Converter with 54/18-Mbps Full-Duplex Communication Using a Single Pair of Transformers 2024 IE

267、EE International Solid-State Circuits Conference19 of 37Comparison on Bias Schemes0.2V Bias010203040time(ns)Adaptive Bias010203040time(ns)1X2X1X2X1X2X01020VP1,VP2(V)0.8V Bias010203040time(ns)Low MOSFET on-resistance.High peak voltage.Variable fOSC.High MOSEFT on-resistance.Low peak voltage.-Slow fOS

268、Csettling.Low MOSFET on-resistance.Low peak voltage.Fast fOSCsettling.31.5 A 750-mW,37%Peak Efficiency Isolated DC-DC Converter with 54/18-Mbps Full-Duplex Communication Using a Single Pair of Transformers 2024 IEEE International Solid-State Circuits Conference20 of 37OscillatorDataINFOUTBOUTFINBCLK

269、RDLL1X/2X RectifierVP2VP1PWM Encoder(Clock/Data Encoding)VS2VS1VS4VS3Shunt RegulatorVREFVOUTVINPWMBDataClockDEMFSK3FSK2FSK1CDRCLK3FSK2FSKFDFCLK1CLK3VS2VS1 Primary SecondaryForward Data Sync.FSK3FSK1PowerCDRDEMSystem Block Diagram:Backward Data31.5 A 750-mW,37%Peak Efficiency Isolated DC-DC Converter

270、 with 54/18-Mbps Full-Duplex Communication Using a Single Pair of Transformers 2024 IEEE International Solid-State Circuits Conference21 of 37OscillatorDataINFOUTBOUTFINBCLKRDLL1X/2X RectifierVP2VP1PWM Encoder(Clock/Data Encoding)VS2VS1VS4VS3Shunt RegulatorVREFVOUTVINPWMBDataClockDEMFSK3FSK2FSK1CDRC

271、LK3FSK2FSKFDFCLK1CLK3VS2VS1 Primary SecondaryForward Data Sync.FSK3FSK1PowerCDRDEMSystem Block Diagram:Backward Data Encode INB(data)and CLKR(clock)as PWM.INB=1:“110;INB=0:“100”.1/3 data rate,but simpler CDR in primary side.PWMBcontrols 1X/2X rectifier:modulates fOSC.PWMBFSK2INB10D=2/3D=1/3fREF2fOSC

272、CLK110OUTBPLLDFFCLKR31.5 A 750-mW,37%Peak Efficiency Isolated DC-DC Converter with 54/18-Mbps Full-Duplex Communication Using a Single Pair of Transformers 2024 IEEE International Solid-State Circuits Conference22 of 37OscillatorDataINFOUTBOUTFINBCLKRDLL1X/2X RectifierVP2VP1PWM Encoder(Clock/Data En

273、coding)VS2VS1VS4VS3Shunt RegulatorVREFVOUTVINPWMBDataClockDEMFSK3FSK2FSK1CDRCLK3FSK2FSKFDFCLK1CLK3VS2VS1 Primary SecondaryForward Data Sync.FSK3FSK1PowerCDRDEMSystem Block Diagram:Backward Data DEM:demodulate frequency fOSCto PWM FSK2.CDR:recover clock CLK1and data OUTB.PWMBFSK2INB10D=2/3D=1/3fREF2f

274、OSCCLK110OUTBPLLDFFCLKR31.5 A 750-mW,37%Peak Efficiency Isolated DC-DC Converter with 54/18-Mbps Full-Duplex Communication Using a Single Pair of Transformers 2024 IEEE International Solid-State Circuits Conference23 of 37OscillatorDataINFOUTBOUTFINBCLKRDLL1X/2X RectifierVP2VP1PWM Encoder(Clock/Data

275、 Encoding)VS2VS1VS4VS3Shunt RegulatorVREFVOUTVINDEMPWMBDataClockDEMFSK3FSK2FSK1CDRCLK3FSK2FSKFCDRDFCLK1CLK3VS2VS1 Primary SecondaryForward Data Sync.FSK3FSK1PowerSystem Block Diagram:Full-Duplex31.5 A 750-mW,37%Peak Efficiency Isolated DC-DC Converter with 54/18-Mbps Full-Duplex Communication Using

276、a Single Pair of Transformers 2024 IEEE International Solid-State Circuits Conference24 of 37OscillatorDataINFOUTBOUTFINBCLKRDLL1X/2X RectifierVP2VP1PWM Encoder(Clock/Data Encoding)VS2VS1VS4VS3Shunt RegulatorVREFVOUTVINDEMPWMBDataClockDEMFSK3FSK2FSK1CDRCLK3FSK2FSKFCDRDFCLK1CLK3VS2VS1 Primary Seconda

277、ryForward Data Sync.FSK3FSK1PowerSystem Block Diagram:Full-Duplex Forward data and backward modulates frequency simultaneously.INFPWMBfOSCFSK1FSK2FSK3FSKFCLK3fREF2fREF3fREF1OUTF101011010DF01111001010131.5 A 750-mW,37%Peak Efficiency Isolated DC-DC Converter with 54/18-Mbps Full-Duplex Communication

278、Using a Single Pair of Transformers 2024 IEEE International Solid-State Circuits Conference25 of 37OscillatorDataINFOUTBOUTFINBCLKRDLL1X/2X RectifierVP2VP1PWM Encoder(Clock/Data Encoding)VS2VS1VS4VS3Shunt RegulatorVREFVOUTVINDEMPWMBDataClockDEMFSK3FSK2FSK1CDRCLK3FSK2FSKFCDRDFCLK1CLK3VS2VS1 Primary S

279、econdaryForward Data Sync.FSK3FSK1PowerSystem Block Diagram:Full-Duplex Feedback:demodulated forwarddata FSKFand clock CLK3.DLL control delay to align rising edge of FSKFand CLK3.INFPWMBfOSCFSK1FSK2FSK3FSKFCLK3fREF2fREF3fREF110101DF111001010131.5 A 750-mW,37%Peak Efficiency Isolated DC-DC Converter

280、with 54/18-Mbps Full-Duplex Communication Using a Single Pair of Transformers 2024 IEEE International Solid-State Circuits Conference26 of 37OscillatorDataINFOUTBOUTFINBCLKRDLL1X/2X RectifierVP2VP1PWM Encoder(Clock/Data Encoding)VS2VS1VS4VS3Shunt RegulatorVREFVOUTVINDEMPWMBDataClockDEMFSK3FSK2FSK1CD

281、RCLK3FSK2FSKFCDRDFCLK1CLK3VS2VS1 Primary SecondaryForward Data Sync.FSK3FSK1PowerSystem Block Diagram:Full-Duplex OUTB:CDR sampling FSKFat the falling edge CLK3.fOSCFSK1FSK2FSK3FSKFCLK3fREF2fREF3fREF1OUTF101001FSK201DQFSKFOUTFFSK3FSK1PLLCLK331.5 A 750-mW,37%Peak Efficiency Isolated DC-DC Converter w

282、ith 54/18-Mbps Full-Duplex Communication Using a Single Pair of Transformers 2024 IEEE International Solid-State Circuits Conference27 of 37 Motivation Modulation Scheme Implementation Measurement Results and Comparisons ConclusionsOutline31.5 A 750-mW,37%Peak Efficiency Isolated DC-DC Converter wit

283、h 54/18-Mbps Full-Duplex Communication Using a Single Pair of Transformers 2024 IEEE International Solid-State Circuits Conference28 of 37OscillatorTX/RXTX/RXRectifierRectifierShunt RegulatorDecoupling CapDecoupling Cap1.2mm 2.2mm0.9mm 2.2mmFor testFor testTransformer:2.8mm 4.6mmSecondary Primary Ch

284、ip and PCB Chip:0.18-m BCD process,0.92.2 mm2and 1.22.2 mm2 Transformer:2.82.2 mm2,75-m FR4 insulator,1-oz copper.200MHz:LP=13.2nH,QP=37,LS=19.3nH,QS=40,k=0.6231.5 A 750-mW,37%Peak Efficiency Isolated DC-DC Converter with 54/18-Mbps Full-Duplex Communication Using a Single Pair of Transformers 2024

285、IEEE International Solid-State Circuits Conference29 of 37Transient Waveforms of Frequency ModulationBackward PWMForward DataVP1 VP2Oscillating Frequency10110001No sub-harmonic oscillation50MHz50ns175 MHz233MHz195MHz257MHz24Mbps 54Mbps 50ns 4-FSK:forward&backward data simultaneously.No sub-harmonic

286、oscillation,fast frequency settling.31.5 A 750-mW,37%Peak Efficiency Isolated DC-DC Converter with 54/18-Mbps Full-Duplex Communication Using a Single Pair of Transformers 2024 IEEE International Solid-State Circuits Conference30 of 37Full-duplex Communication 54-Mbps forward data.18-Mbps backward d

287、ata:can be improved by advanced encoding and CDR.BER 10-6.Backward Data(TX)Backward Data(RX)Forward Data(TX)Forward Data(RX)100ns54Mbps 18Mbps 1718192021Backward Data Rate(Mbps)10-710-610-510-410-310-210-1Bit Error Rate5154576063Forward Data Rate(Mbps)31.5 A 750-mW,37%Peak Efficiency Isolated DC-DC

288、Converter with 54/18-Mbps Full-Duplex Communication Using a Single Pair of Transformers 2024 IEEE International Solid-State Circuits Conference31 of 3715%12%19%12%39%3%圖表標題OscillatorTransformerRectifierParasitic BJTOutputOthersVOUTMOSFET diodeSimulated power breakdown 2X,remove CA00.050.10.150.2Load

289、 Current(A)00.10.20.30.40.5Efficiency00.050.10.15Load Current(A)54-Mbps PRBS24-Mbps PRBS36%0.12A36%0.13A48%0.19A46%0.21A37%0.15AP+N+P+NWPSUB1X,+CA1X,CA2X,+CA2X,CAEfficiency 750-mW maximal output power,37%efficiency with 54Mbps data.Efficiency can be further improved by parasitic BJT leakage optimiza

290、tion.31.5 A 750-mW,37%Peak Efficiency Isolated DC-DC Converter with 54/18-Mbps Full-Duplex Communication Using a Single Pair of Transformers 2024 IEEE International Solid-State Circuits Conference32 of 372,2.6This workISSCC 16 2ISSCC 20 1Chip Process180nm BCD350nm BCD130nm CMOSTransformer#1Transform

291、er#2Power,full-duplex dataPower,half-duplex dataPower,forward dataN.A.N.A.Backward dataTransformer TypePCBOn-siliconPCBPrimary,Secondary Chip Size(mm2)4.3,0.74.5,4.5Transformer Size(mm2)12.9On primary chip25.2TCAS-I 18 6180nm BCDPowerHalf-duplex dataOn-silicon6.7,2.4On primary chipOscillation Freque

292、ncy(MHz)175257330 100350Comparison Table The first work using a single transformer pair for power and full-duplex data communication.31.5 A 750-mW,37%Peak Efficiency Isolated DC-DC Converter with 54/18-Mbps Full-Duplex Communication Using a Single Pair of Transformers 2024 IEEE International Solid-S

293、tate Circuits Conference33 of 37Max Output Power(mW)75023.7123Peak Efficiency37%N.A.23%9319%This workISSCC 16 2ISSCC 20 1Oscillation Frequency(MHz)175257330 100Forward Data Rate(Mbps)5421+0.5*3*Backward Data Rate(Mbps)181440*Bit Error Rate N.A.TCAS-I 18 635050*5*Modulation SchemeFSKASKASKFSK*Measure

294、d with unidirectional data rate.*Multiple data channels.Comparison Table High frequency&efficiency:self-oscillating DC-DC&high-Q transformer.Highest data rate with BER 10-6.31.5 A 750-mW,37%Peak Efficiency Isolated DC-DC Converter with 54/18-Mbps Full-Duplex Communication Using a Single Pair of Tran

295、sformers 2024 IEEE International Solid-State Circuits Conference34 of 37 Motivation Modulation Scheme Implementation Measurement Results and Comparisons ConclusionsOutline31.5 A 750-mW,37%Peak Efficiency Isolated DC-DC Converter with 54/18-Mbps Full-Duplex Communication Using a Single Pair of Transf

296、ormers 2024 IEEE International Solid-State Circuits Conference35 of 37ConclusionsThe first self-oscillating isolated DC-DC converter achievingpower transfer and full-duplex communication within a PCBtransformer pair.Forward FSK:C-f modulation.Backward FSK:1X/2X rectifier.Proposed adaptive bias:no su

297、b-harmonic oscillation and lowMOSFET on-resistance.37%peak efficiency,750-mW output power and 54/18-Mbpsforward/backward data with BER POUT Single-Input-Dual-Output(SIDO):source to load and battery.VINDual-mode DC-DC converterLoadSRCPIN POUTSIDO0.3-1.8VVOUTVBAT 2.5V1.8V31.6:A SIDO/DISO VCF-Step-Reco

298、nfigurable Continuously Scalable-Conversion-Ratio SC Converter Achieving 91.4%/92.6%Peak Efficiency and Almost-lossless Channel Switching 2024 IEEE International Solid-State Circuits Conference5 of 75VINDual-mode DC-DC converterLoadSRCPIN POUTDISO0.3-1.8VVOUTVBAT 2.5V1.8VEH Interface:when PIN POUTPI

299、N POUTPIN VOUT)31.6:A SIDO/DISO VCF-Step-Reconfigurable Continuously Scalable-Conversion-Ratio SC Converter Achieving 91.4%/92.6%Peak Efficiency and Almost-lossless Channel Switching 2024 IEEE International Solid-State Circuits Conference31 of 75TMC Sol.2:Idle CFs with,for VOUT31.6:A SIDO/DISO VCF-S

300、tep-Reconfigurable Continuously Scalable-Conversion-Ratio SC Converter Achieving 91.4%/92.6%Peak Efficiency and Almost-lossless Channel Switching 2024 IEEE International Solid-State Circuits Conference32 of 75TMC Sol.2:Then Phases Reorganized in VOUT31.6:A SIDO/DISO VCF-Step-Reconfigurable Continuou

301、sly Scalable-Conversion-Ratio SC Converter Achieving 91.4%/92.6%Peak Efficiency and Almost-lossless Channel Switching 2024 IEEE International Solid-State Circuits Conference33 of 75TMC Sol.2:When Change Back to VBAT,Inherit,31.6:A SIDO/DISO VCF-Step-Reconfigurable Continuously Scalable-Conversion-Ra

302、tio SC Converter Achieving 91.4%/92.6%Peak Efficiency and Almost-lossless Channel Switching 2024 IEEE International Solid-State Circuits Conference34 of 75TMC Sol.2:More VCFs Have no Change31.6:A SIDO/DISO VCF-Step-Reconfigurable Continuously Scalable-Conversion-Ratio SC Converter Achieving 91.4%/92

303、.6%Peak Efficiency and Almost-lossless Channel Switching 2024 IEEE International Solid-State Circuits Conference35 of 75TMC Sol.2:But May Still Have Large VCFsX Unequal VCFsteps.X Large loss if VBAT VOUT.31.6:A SIDO/DISO VCF-Step-Reconfigurable Continuously Scalable-Conversion-Ratio SC Converter Ach

304、ieving 91.4%/92.6%Peak Efficiency and Almost-lossless Channel Switching 2024 IEEE International Solid-State Circuits Conference36 of 75Proposed(Sol.3):Idle CFs+Reconfigurable CSC(RCSC)631.6:A SIDO/DISO VCF-Step-Reconfigurable Continuously Scalable-Conversion-Ratio SC Converter Achieving 91.4%/92.6%P

305、eak Efficiency and Almost-lossless Channel Switching 2024 IEEE International Solid-State Circuits Conference37 of 75Proposed(Sol.3):Idle CFs+Reconfigurable CSC(RCSC)6 Almost all VCFs match.Almost equal VCFsteps.Better efficiency over wide VCR range(inherit from 6 Wang,ISSCC23).31.6:A SIDO/DISO VCF-S

306、tep-Reconfigurable Continuously Scalable-Conversion-Ratio SC Converter Achieving 91.4%/92.6%Peak Efficiency and Almost-lossless Channel Switching 2024 IEEE International Solid-State Circuits Conference38 of 75Brief Summary on Three Solutions Almost equal VCFsteps.Almost all VCFs match.Better efficie

307、ncy over VCR.Better than Sol.1XUnequal VCFsteps.XLarge loss if VBAT VOUT.XLarge VCF.XLarge loss.XLong settling time.Sol.1Sol.2Sol.331.6:A SIDO/DISO VCF-Step-Reconfigurable Continuously Scalable-Conversion-Ratio SC Converter Achieving 91.4%/92.6%Peak Efficiency and Almost-lossless Channel Switching 2

308、024 IEEE International Solid-State Circuits Conference39 of 75Normalized Charge Sharing Loss(VCF,i)2to Sol.1 Sol.2 and Sol.3 lower loss:from CFidling.Sol.3 has wider VCR range with high-efficiency:from equal VCFsteps.00.020.0400.020.04SIDODISOSol.3Sol.2Sol.1VIN(V)VIN(V)31.6:A SIDO/DISO VCF-Step-Reco

309、nfigurable Continuously Scalable-Conversion-Ratio SC Converter Achieving 91.4%/92.6%Peak Efficiency and Almost-lossless Channel Switching 2024 IEEE International Solid-State Circuits Conference40 of 75 Motivation Working Principles ImplementationsSchematicEven/odd phase matching Measurement Results

310、ConclusionsOutline31.6:A SIDO/DISO VCF-Step-Reconfigurable Continuously Scalable-Conversion-Ratio SC Converter Achieving 91.4%/92.6%Peak Efficiency and Almost-lossless Channel Switching 2024 IEEE International Solid-State Circuits Conference41 of 75M+N=14:31 Sub-SC CellsSub-cell 1Sub-cell 31Gate ctr

311、l.gen.fCLKEAModeCF1.STout,1SBout,1SVSS,1ST13,1VT13STin,1SBin,1STbat,1SB1,1VB13SB13,1VB1VOUTVBATVINGate drive01CHVMPPCVCOVREFADCDecoderVT1ST1,1.SBxx,yyyyth cellxxth switchT or B plate=1 SIDO=0 DISOVIN regulationVOUT regulationVINInherit form 6Add in two-mode RCSC31.6:A SIDO/DISO VCF-Step-Reconfigurab

312、le Continuously Scalable-Conversion-Ratio SC Converter Achieving 91.4%/92.6%Peak Efficiency and Almost-lossless Channel Switching 2024 IEEE International Solid-State Circuits Conference42 of 75Decoder:RCSC for Equal VCFstepsSub-cell 1Sub-cell 31Gate ctrl.gen.fCLKEAModeCF1.STout,1SBout,1SVSS,1ST13,1V

313、T13STin,1SBin,1STbat,1SB1,1VB13SB13,1VB1VOUTVBATVINGate drive01CHVMPPCVCOVREFADCDecoderVT1ST1,1.SBxx,yyyyth cellxxth switchT or B plate=1 SIDO=0 DISOVIN regulationVOUT regulationVIN31.6:A SIDO/DISO VCF-Step-Reconfigurable Continuously Scalable-Conversion-Ratio SC Converter Achieving 91.4%/92.6%Peak

314、Efficiency and Almost-lossless Channel Switching 2024 IEEE International Solid-State Circuits Conference43 of 75VINRegulation Loop:for MPPTSub-cell 1Sub-cell 31Gate ctrl.gen.fCLKEAModeCF1.STout,1SBout,1SVSS,1ST13,1VT13STin,1SBin,1STbat,1SB1,1VB13SB13,1VB1VOUTVBATVINGate drive01CHVMPPCVCOVREFADCDecod

315、erVT1ST1,1.SBxx,yyyyth cellxxth switchT or B plate=1 SIDO=0 DISOVIN regulationVOUT regulationVIN31.6:A SIDO/DISO VCF-Step-Reconfigurable Continuously Scalable-Conversion-Ratio SC Converter Achieving 91.4%/92.6%Peak Efficiency and Almost-lossless Channel Switching 2024 IEEE International Solid-State

316、Circuits Conference44 of 75VINRegulation Loop:Hysteresis Control Determines DSub-cell 1Sub-cell 31Gate ctrl.gen.fCLKEAModeCF1.STout,1SBout,1SVSS,1ST13,1VT13STin,1SBin,1STbat,1SB1,1VB13SB13,1VB1VOUTVBATVINGate drive01CHVMPPCVCOVREFADCDecoderVT1ST1,1.SBxx,yyyyth cellxxth switchT or B plate=1 SIDO=0 DI

317、SOVIN regulationVOUT regulationVINVILVIHVINCHVIN to VBATVIN to VOUTVOUTfCLKVMPPDSIDOVINCHVOUTfCLKVIN to VOUTVBAT to VOUTfCLK1fCLK2VILVIHVMPPDDISO31.6:A SIDO/DISO VCF-Step-Reconfigurable Continuously Scalable-Conversion-Ratio SC Converter Achieving 91.4%/92.6%Peak Efficiency and Almost-lossless Chann

318、el Switching 2024 IEEE International Solid-State Circuits Conference45 of 75VOUTRegulation LoopSub-cell 1Sub-cell 31Gate ctrl.gen.fCLKEAModeCF1.STout,1SBout,1SVSS,1ST13,1VT13STin,1SBin,1STbat,1SB1,1VB13SB13,1VB1VOUTVBATVINGate drive01CHVMPPCVCOVREFADCDecoderVT1ST1,1.SBxx,yyyyth cellxxth switchT or B

319、 plate=1 SIDO=0 DISOVIN regulationVOUT regulationVIN31.6:A SIDO/DISO VCF-Step-Reconfigurable Continuously Scalable-Conversion-Ratio SC Converter Achieving 91.4%/92.6%Peak Efficiency and Almost-lossless Channel Switching 2024 IEEE International Solid-State Circuits Conference46 of 75VOUTRegulation Lo

320、op:PFM Control Determines fCLKSub-cell 1Sub-cell 31Gate ctrl.gen.fCLKEAModeCF1.STout,1SBout,1SVSS,1ST13,1VT13STin,1SBin,1STbat,1SB1,1VB13SB13,1VB1VOUTVBATVINGate drive01CHVMPPCVCOVREFADCDecoderVT1ST1,1.SBxx,yyyyth cellxxth switchT or B plate=1 SIDO=0 DISOVIN regulationVOUT regulationVINVILVIHVINCHVI

321、N to VBATVIN to VOUTVOUTfCLKVMPPDSIDOVINCHVOUTfCLKVIN to VOUTVBAT to VOUTfCLK1fCLK2VILVIHVMPPDDISO31.6:A SIDO/DISO VCF-Step-Reconfigurable Continuously Scalable-Conversion-Ratio SC Converter Achieving 91.4%/92.6%Peak Efficiency and Almost-lossless Channel Switching 2024 IEEE International Solid-Stat

322、e Circuits Conference47 of 75 Motivation and Working Principles ImplementationsSchematicEven/odd phase matching Measurement Results ConclusionsOutline31.6:A SIDO/DISO VCF-Step-Reconfigurable Continuously Scalable-Conversion-Ratio SC Converter Achieving 91.4%/92.6%Peak Efficiency and Almost-lossless

323、Channel Switching 2024 IEEE International Solid-State Circuits Conference48 of 75Ex:Idle,(EVEN)at t2,Inherit Them(EVEN)at t431.6:A SIDO/DISO VCF-Step-Reconfigurable Continuously Scalable-Conversion-Ratio SC Converter Achieving 91.4%/92.6%Peak Efficiency and Almost-lossless Channel Switching 2024 IEE

324、E International Solid-State Circuits Conference49 of 75But Not Certain Whether Other CFs at ODD or EVEN at t331.6:A SIDO/DISO VCF-Step-Reconfigurable Continuously Scalable-Conversion-Ratio SC Converter Achieving 91.4%/92.6%Peak Efficiency and Almost-lossless Channel Switching 2024 IEEE International

325、 Solid-State Circuits Conference50 of 75No Problem if Other CFs at EVEN Phase at t3 All CFs at EVEN phases at t4.31.6:A SIDO/DISO VCF-Step-Reconfigurable Continuously Scalable-Conversion-Ratio SC Converter Achieving 91.4%/92.6%Peak Efficiency and Almost-lossless Channel Switching 2024 IEEE Internati

326、onal Solid-State Circuits Conference51 of 75If CFs at ODD Phase at t3and t4,But Inherit,(EVEN)at t4 Against Rule for CSC:All CFs should be in EVEN or ODD phases.31.6:A SIDO/DISO VCF-Step-Reconfigurable Continuously Scalable-Conversion-Ratio SC Converter Achieving 91.4%/92.6%Peak Efficiency and Almos

327、t-lossless Channel Switching 2024 IEEE International Solid-State Circuits Conference52 of 75X VCFstep degeneration,and bad efficiency.EVEN/ODD Phase Mismatch:VCFStep Degenerationt1t2t3t4VTVB83mV86mV156mV156mVEEOOOEOEE31.6:A SIDO/DISO VCF-Step-Reconfigurable Continuously Scalable-Conversion-Ratio SC

328、Converter Achieving 91.4%/92.6%Peak Efficiency and Almost-lossless Channel Switching 2024 IEEE International Solid-State Circuits Conference53 of 75 No VCFstep degeneration.Proposed EVEN/ODD Phase Matchingt1t2t3t4VTVB83mV86mV83mV86mV31.6:A SIDO/DISO VCF-Step-Reconfigurable Continuously Scalable-Conv

329、ersion-Ratio SC Converter Achieving 91.4%/92.6%Peak Efficiency and Almost-lossless Channel Switching 2024 IEEE International Solid-State Circuits Conference54 of 75 Motivation Working Principles Implementations Measurement Results ConclusionsOutline31.6:A SIDO/DISO VCF-Step-Reconfigurable Continuous

330、ly Scalable-Conversion-Ratio SC Converter Achieving 91.4%/92.6%Peak Efficiency and Almost-lossless Channel Switching 2024 IEEE International Solid-State Circuits Conference55 of 75Die MicrographFabricated in 65-nm CMOS process.Silicon area:4mm2.Overall CFs:20nF.1600 m2500 mCore 1 to 31Core 1CAPSwitc

331、hesLogicsOther blocks:100*300 m231.6:A SIDO/DISO VCF-Step-Reconfigurable Continuously Scalable-Conversion-Ratio SC Converter Achieving 91.4%/92.6%Peak Efficiency and Almost-lossless Channel Switching 2024 IEEE International Solid-State Circuits Conference56 of 75SIDO Measured Waveforms:Sol.1 VCF=1.2

332、V tsettleVT VB=VCFVOUTVINVBATVTVBCH1V VCF=1.2V,tsettle=100s in channel switching.SIDO:CH=0,INOUT(Step-up);CH=1,INBAT(Step-up);31.6:A SIDO/DISO VCF-Step-Reconfigurable Continuously Scalable-Conversion-Ratio SC Converter Achieving 91.4%/92.6%Peak Efficiency and Almost-lossless Channel Switching 2024 I

333、EEE International Solid-State Circuits Conference57 of 75SIDO Measured Waveforms:Sol.2 VCF=0.5V,tsettle=20s in channel switching.tsettle VCF=0.5V VT VB=VCFVOUTVINVBATVTVBCHSIDO:CH=0,INOUT(Step-up);CH=1,INBAT(Step-up);31.6:A SIDO/DISO VCF-Step-Reconfigurable Continuously Scalable-Conversion-Ratio SC Converter Achieving 91.4%/92.6%Peak Efficiency and Almost-lossless Channel Switching 2024 IEEE Inter